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authorChristian Geddes <crgeddes@us.ibm.com>2018-05-15 10:28:29 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2018-05-18 15:09:15 -0400
commit42327316097c17cb3a0ef2ba212c2722121af861 (patch)
tree5d769c96ec72fc6851add774ab1836d7650b2f07 /src/usr
parent3148c8e41ee89cb6dfcc419a6960873e4d7bc3fd (diff)
downloadtalos-hostboot-42327316097c17cb3a0ef2ba212c2722121af861.tar.gz
talos-hostboot-42327316097c17cb3a0ef2ba212c2722121af861.zip
Slave SBE scratch regs must be up to date before continueMPIPL called
There was a hole in the MPIPL path where we were not updating the slave SBE scratch registers prior to rebooting them with the continueMPIPL chip op. Without this we ran the risk of not having correct information in the registers when the slave sbe restarted. Change-Id: Ib666388ef8773cd16c3f403fa83750da3e551c55 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58842 Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr')
-rw-r--r--src/usr/isteps/istep06/host_discover_targets.C53
-rw-r--r--src/usr/isteps/istep06/makefile6
2 files changed, 55 insertions, 4 deletions
diff --git a/src/usr/isteps/istep06/host_discover_targets.C b/src/usr/isteps/istep06/host_discover_targets.C
index 65d38b839..a5447e72b 100644
--- a/src/usr/isteps/istep06/host_discover_targets.C
+++ b/src/usr/isteps/istep06/host_discover_targets.C
@@ -61,6 +61,7 @@
#include <sys/misc.h>
#include <p9_query_core_access_state.H>
+#include <p9_setup_sbe_config.H>
#include <p9_query_cache_access_state.H>
#include <p9_hcd_core_stopclocks.H>
#include <p9_hcd_cache_stopclocks.H>
@@ -207,8 +208,46 @@ errlHndl_t sendContinueMpiplChipOp()
}
}
}
+ return l_err;
+}
+
+/**
+* @brief Walk through list of PROC chip targets and run p9_setup_sbe_config
+* HWP on all of the slave PROC chips to ensure scratch regs are updated
+*
+* @return errlHndl_t
+*/
+errlHndl_t updateSlaveSbeScratchRegs()
+{
+ errlHndl_t l_err = nullptr;
+
+ TARGETING::TargetHandleList l_procChips;
+ TARGETING::getAllChips(l_procChips, TARGETING::TYPE_PROC, true);
+ TARGETING::PROC_SBE_MASTER_CHIP_ATTR l_is_master_chip = 1;
+
+ for(const auto & l_chip : l_procChips)
+ {
+ l_is_master_chip = l_chip->getAttr<TARGETING::ATTR_PROC_SBE_MASTER_CHIP>();
+ if(!l_is_master_chip)
+ {
+ fapi2::Target <fapi2::TARGET_TYPE_PROC_CHIP> l_fapi_proc_target (l_chip);
+ // Run the setup_sbe_config hwp on all of the slave procs to make sure
+ // the scratch registers are up to date prior to sending the continueMPIPL
+ // operation
+ FAPI_INVOKE_HWP(l_err,
+ p9_setup_sbe_config,
+ l_fapi_proc_target);
-return l_err;
+ if(l_err)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "Failed during updateSlaveSbeScratchRegs request on this proc = %x",
+ l_chip->getAttr<TARGETING::ATTR_HUID>());
+ break;
+ }
+ }
+ }
+ return l_err;
}
@@ -444,14 +483,22 @@ void* host_discover_targets( void *io_pArgs )
"when the targeting service started");
do
{
- //Need to power down the slave quads
+ // Need to power down the slave quads
l_err = powerDownSlaveQuads();
if (l_err)
{
break;
}
- //Send continue mpipl op to slave procs
+ // Need to ensure slave SBE's scratch registers are
+ // up to date prior to sending continueMPIPL op
+ l_err = updateSlaveSbeScratchRegs();
+ if (l_err)
+ {
+ break;
+ }
+
+ // Send continue mpipl op to slave procs
l_err = sendContinueMpiplChipOp();
if (l_err)
{
diff --git a/src/usr/isteps/istep06/makefile b/src/usr/isteps/istep06/makefile
index 05d298b15..e5e273e18 100644
--- a/src/usr/isteps/istep06/makefile
+++ b/src/usr/isteps/istep06/makefile
@@ -5,7 +5,7 @@
#
# OpenPOWER HostBoot Project
#
-# Contributors Listed Below - COPYRIGHT 2015,2017
+# Contributors Listed Below - COPYRIGHT 2015,2018
# [+] International Business Machines Corp.
#
#
@@ -36,6 +36,7 @@ OBJS += call_host_voltage_config.o
SUBDIRS += thread_activate.d
+PERV_HWP_PATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/perv
NEST_HWP_PATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/nest
PM_HWP_PATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/pm
CORE_HWP_PATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/core
@@ -43,6 +44,7 @@ CACHE_HWP_PATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/cache
LIB_HWP_PATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/lib
VPATH += ${NEST_HWP_PATH}
+VPATH += ${PERV_HWP_PATH}
VPATH += ${PM_HWP_PATH}
VPATH += ${LIB_HWP_PATH}
VPATH += ${CORE_HWP_PATH}
@@ -54,6 +56,7 @@ EXTRAINCDIR += ${ROOTPATH}/src/include/usr/fapi2
EXTRAINCDIR += ${ROOTPATH}/src/include/usr/secureboot
EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/common/include
EXTRAINCDIR += ${NEST_HWP_PATH}
+EXTRAINCDIR += ${PERV_HWP_PATH}
EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/utils
EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/utils/imageProcs/
EXTRAINCDIR += ${ROOTPATH}/src/import/chips/common/utils/imageProcs/
@@ -74,6 +77,7 @@ include $(NEST_HWP_PATH)/p9_revert_sbe_mcs_setup.mk
# Take another look at PM lib
include $(PM_HWP_PATH)/p9_pm_utils.mk
+include $(PERV_HWP_PATH)/p9_setup_sbe_config.mk
include $(PM_HWP_PATH)/p9_query_core_access_state.mk
include $(PM_HWP_PATH)/p9_query_cache_access_state.mk
include $(PM_HWP_PATH)/p9_quad_power_off.mk
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