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authorElizabeth Liner <eliner@us.ibm.com>2015-12-03 16:58:28 -0600
committerPatrick Williams <iawillia@us.ibm.com>2015-12-11 15:30:30 -0600
commitd39534d784219f45822dcd8df264fca0d0fdf5de (patch)
treecdd51a617cd7da5fde315fac5763d832618c8828 /src/usr
parent451605a7bb64d9ca4d64473d1feb86a2643a4d1d (diff)
downloadtalos-hostboot-d39534d784219f45822dcd8df264fca0d0fdf5de.tar.gz
talos-hostboot-d39534d784219f45822dcd8df264fca0d0fdf5de.zip
Adding temporary default values for attributes consumed by HDAT
Change-Id: I1baeb94c91eaf8d4becb627359b198b4522e83d7 RTC:132573 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22439 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr')
-rw-r--r--src/usr/isteps/istep07/call_mss_eff_config.C2
-rw-r--r--src/usr/targeting/attrsync.C101
-rw-r--r--src/usr/targeting/common/xmltohb/attribute_types.xml26
-rwxr-xr-xsrc/usr/targeting/common/xmltohb/target_types.xml7
4 files changed, 131 insertions, 5 deletions
diff --git a/src/usr/isteps/istep07/call_mss_eff_config.C b/src/usr/isteps/istep07/call_mss_eff_config.C
index 07d49ad1f..60a666f2e 100644
--- a/src/usr/isteps/istep07/call_mss_eff_config.C
+++ b/src/usr/isteps/istep07/call_mss_eff_config.C
@@ -46,6 +46,7 @@
#include <targeting/common/utilFilter.H>
#include <config.h>
+#include <targeting/attrsync.H>
namespace ISTEP_07
{
@@ -218,6 +219,7 @@ void* call_mss_eff_config( void *io_pArgs )
TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_eff_config entry" );
+ TARGETING::hdatAttrHack();
//@TODO RTC:133830 Add the wrapper back in when ready
/*
errlHndl_t l_err = NULL;
diff --git a/src/usr/targeting/attrsync.C b/src/usr/targeting/attrsync.C
index 1a6b54be4..eea1078dc 100644
--- a/src/usr/targeting/attrsync.C
+++ b/src/usr/targeting/attrsync.C
@@ -27,6 +27,7 @@
#include <targeting/common/trace.H>
#include <initservice/initserviceif.H>
#include <errl/hberrltypes.H>
+#include <hwas/common/hwasCommon.H>
using namespace ERRORLOG;
@@ -602,6 +603,106 @@ namespace TARGETING
return l_errl;
}
+ //TODO RTC 143191
+ errlHndl_t hdatAttrHack()
+ {
+ TARG_INF(ENTER_MRK "hdatAttrHack" );
+
+ errlHndl_t l_errl = NULL;
+ do{
+
+ //sys-sys-power9 - base
+ TARGETING::Target* l_pTopLevel = NULL;
+ TARGETING::targetService().getTopLevelTarget(l_pTopLevel);
+ //l_pTopLevel->getAttr<ATTR_FREQ_A>(); //defaulted in attribute_types.xml
+ l_pTopLevel->setAttr<ATTR_FREQ_X>(0xfa0);
+ //l_pTopLevel->setAttr<ATTR_MAX_MCS_PER_SYSTEM>(4); //defaulted in attribute_types.xml
+ l_pTopLevel->setAttr<ATTR_NOMINAL_FREQ_MHZ>(0xf75);
+
+ //chip-base
+ PredicateCTM predEnc(CLASS_ENC);
+ PredicateCTM predChip(CLASS_CHIP);
+ PredicateCTM predDimm(CLASS_LOGICAL_CARD, TYPE_DIMM);
+ PredicatePostfixExpr checkExpr;
+ checkExpr.push(&predChip).push(&predDimm).Or().push(&predEnc).Or();
+
+ TargetHandleList pCheckPres;
+ targetService().getAssociated( pCheckPres, l_pTopLevel,
+ TargetService::CHILD, TargetService::ALL, &checkExpr );
+
+ TARG_INF("pCheckPres size: %d", pCheckPres.size());
+ l_errl = HWAS::platPresenceDetect(pCheckPres);
+ TARG_INF("pCheckPres size: %d", pCheckPres.size());
+
+ std::sort(pCheckPres.begin(),pCheckPres.end(),
+ compareTargetHuid);
+
+ for(TargetHandleList::const_iterator pTarget_it =
+ pCheckPres.begin();
+ pTarget_it != pCheckPres.end();
+ ++pTarget_it
+ )
+ {
+ TargetHandle_t pTarget = *pTarget_it;
+ if(pTarget->getAttr<ATTR_CLASS>() == CLASS_CHIP)
+ {
+ pTarget->setAttr<ATTR_CHIP_ID>(0x20D1);
+ pTarget->setAttr<ATTR_EC>(0x10);
+ }
+ }
+
+ //chip-processor - chip
+ TARGETING::TargetHandleList l_procList;
+ getAllChips(l_procList, TYPE_PROC);
+
+ for(TargetHandleList::const_iterator proc = l_procList.begin();
+ proc != l_procList.end(); ++proc)
+ {
+ uint64_t mirrorBase[] = {0x800000000000,0x0,0x0,0x0};
+ (*proc)->setAttr<ATTR_PROC_MIRROR_BASES>(mirrorBase);
+ uint64_t mirrorSize[] = {0x400000000,0x0,0x0,0x0};
+ (*proc)->setAttr<ATTR_PROC_MIRROR_SIZES>(mirrorSize);
+ //(*proc)->setAttr<ATTR_FABRIC_CHIP_ID>(0); //defaulted in attribute_types.xml
+ //(*proc)->setAttr<ATTR_FABRIC_NODE_ID>(0); //defualted in attribute_types.xml
+ uint64_t memBases[] = {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0};
+ (*proc)->setAttr<ATTR_PROC_MEM_BASES>(memBases);
+ uint64_t memSizes[] = {0x800000000,0x0,0x0,0x0,0x0,0x0,0x0,0x0};
+ (*proc)->setAttr<ATTR_PROC_MEM_SIZES>(memSizes);
+ (*proc)->setAttr<ATTR_PROC_HTM_BAR_BASE_ADDR>(0);
+ //(*proc)->setAttr<ATTR_PROC_PCIE_LANE_EQUALIZATION>(pcieLane); //defaulted in attribute_types.xml
+ uint8_t mssMem[] = {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0};
+ (*proc)->setAttr<ATTR_MSS_MEM_MC_IN_GROUP>(mssMem);
+ uint8_t procActive = 0xc0;
+ (*proc)->setAttr<ATTR_PROC_PCIE_PHB_ACTIVE>(procActive);
+
+ //mcbist
+ TARGETING::TargetHandleList l_mcbistList;
+ getChildChiplets(l_mcbistList,(*proc), TARGETING::TYPE_MCBIST);
+ for(TargetHandleList::const_iterator mcbist = l_mcbistList.begin();
+ mcbist != l_mcbistList.end(); ++mcbist)
+ {
+ (*mcbist)->setAttr<ATTR_MSS_FREQ>(1600);
+ }
+
+ //mca
+ TARGETING::TargetHandleList l_mcaList;
+ getChildChiplets(l_mcaList,(*proc),TARGETING::TYPE_MCA);
+ for(TargetHandleList::const_iterator mca = l_mcaList.begin();
+ mca != l_mcaList.end(); ++mca)
+ {
+ uint8_t effDimmSize[][2] = {{0x4,0x0},{0x4,0x0}};
+ (*mca)->setAttr<ATTR_EFF_DIMM_SIZE>(effDimmSize);
+ }
+
+ //EFFECTIVE_EC was hardcoded as well.
+ }
+
+ } while (0);
+
+ TARG_INF( EXIT_MRK "hdatAttrHack" );
+ return l_errl;
+ }
+
}; // end namespace
diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml
index 748ea9b03..3aa09073e 100644
--- a/src/usr/targeting/common/xmltohb/attribute_types.xml
+++ b/src/usr/targeting/common/xmltohb/attribute_types.xml
@@ -1991,7 +1991,9 @@
Provided by the Machine Readable Workbook.
Can vary across drawers.
</description>
- <simpleType><uint8_t></uint8_t></simpleType>
+ <simpleType><uint8_t>
+ <default>0</default>
+ </uint8_t></simpleType>
<persistency>non-volatile</persistency>
<readable/>
<hwpfToHbAttrMap>
@@ -2008,7 +2010,9 @@
Provided by the Machine Readable Workbook.
Can vary across drawers.
</description>
- <simpleType><uint8_t></uint8_t></simpleType>
+ <simpleType><uint8_t>
+ <default>0</default>
+ </uint8_t></simpleType>
<persistency>non-volatile</persistency>
<readable/>
<hwpfToHbAttrMap>
@@ -2125,7 +2129,9 @@
This is the same for all A-bus chiplets in the system.
Provided by the MRW.
</description>
- <simpleType><uint32_t></uint32_t></simpleType>
+ <simpleType><uint32_t>
+ <default>0x1900</default>
+ </uint32_t></simpleType>
<persistency>non-volatile</persistency>
<readable/>
<hwpfToHbAttrMap>
@@ -10489,6 +10495,7 @@ Measured in GB</description>
</description>
<simpleType>
<uint8_t>
+ <default>4</default>
</uint8_t>
</simpleType>
<persistency>non-volatile</persistency>
@@ -13364,7 +13371,7 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript
</description>
<simpleType>
<uint8_t>
- <default>0x00</default>
+ <default>0x10</default>
</uint8_t>
</simpleType>
<persistency>non-volatile</persistency>
@@ -15148,7 +15155,16 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript
Bit 12:15 - dn_tx_preset
</description>
<simpleType>
- <uint8_t>
+ <uint8_t><default>0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,
+ 0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,
+ 0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,
+ 0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x0,
+ 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x77,
+ 0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,
+ 0x77,0x77,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,
+ 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,
+ 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,
+ 0x0,0x0</default>
</uint8_t>
<array>4,32</array>
</simpleType>
diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml
index 1bb969172..ecb742190 100755
--- a/src/usr/targeting/common/xmltohb/target_types.xml
+++ b/src/usr/targeting/common/xmltohb/target_types.xml
@@ -540,6 +540,7 @@
<attribute><id>PROC_R_LOADLINE_VCS</id></attribute>
<attribute><id>PROC_R_DISTLOSS_VCS</id></attribute>
<attribute><id>PROC_VRM_VOFFSET_VCS</id></attribute>
+ <attribute><id>PROC_HTM_BAR_BASE_ADDR</id></attribute>
</targetType>
<targetType>
@@ -1991,6 +1992,9 @@
<attribute><id>PAYLOAD_IN_MIRROR_MEM</id></attribute>
<!-- AVP override for fused cores or normal cores -->
<attribute><id>FUSED_CORE_OPTION</id></attribute>
+ <attribute><id>MIRROR_BASE_ADDRESS</id></attribute>
+ <attribute><id>EFFECTIVE_EC</id></attribute>
+ <attribute><id>HB_RSV_MEM_SIZE_MB</id></attribute>
</targetType>
<!-- enc-node-power9 -->
@@ -2096,6 +2100,7 @@
<attribute><id>PROC_PCIE_IOP_TX_FFE_GEN2</id></attribute>
<attribute><id>PROC_PCIE_IOP_CONFIG</id></attribute>
<attribute><id>PROC_PCIE_PHB_ACTIVE</id></attribute>
+ <attribute><id>PROC_HTM_BAR_SIZE</id></attribute>
<attribute><id>XSCOM_BASE_ADDRESS</id></attribute>
</targetType>
@@ -2228,6 +2233,7 @@
<default>MCA</default>
</attribute>
<attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute>
+ <attribute><id>EFF_DIMM_SIZE</id></attribute>
</targetType>
<targetType>
@@ -2250,6 +2256,7 @@
<default>MCBIST</default>
</attribute>
<attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute>
+ <attribute><id>MSS_FREQ</id></attribute>
</targetType>
<targetType>
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