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authorDean Sanner <dsanner@us.ibm.com>2014-02-18 15:23:25 -0600
committerA. Patrick Williams III <iawillia@us.ibm.com>2014-03-07 14:15:18 -0600
commit90a2b9b3512fe29b1b21f27783f5a560cdce04df (patch)
tree16bac9ba77a4e01fea24b22f73c4b7b272fa55be /src/usr
parent146282f681bbc6f3d906b13cbb4396b9aecbf90e (diff)
downloadtalos-hostboot-90a2b9b3512fe29b1b21f27783f5a560cdce04df.tar.gz
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Devtree updates for tod, nominal freq
Change-Id: I296abaa2a033d3afbce1a6f05289637c953c5c3f RTC: 88002 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/8963 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr')
-rw-r--r--src/usr/devtree/bld_devtree.C21
-rwxr-xr-xsrc/usr/hwpf/hwp/tod_init/TodHwpIntf.C19
-rw-r--r--src/usr/hwpf/hwp/tod_init/tod_init.C2
-rw-r--r--src/usr/targeting/common/xmltohb/attribute_types.xml34
-rw-r--r--src/usr/targeting/common/xmltohb/target_types.xml2
5 files changed, 69 insertions, 9 deletions
diff --git a/src/usr/devtree/bld_devtree.C b/src/usr/devtree/bld_devtree.C
index 2124cae6b..b60190ccb 100644
--- a/src/usr/devtree/bld_devtree.C
+++ b/src/usr/devtree/bld_devtree.C
@@ -51,6 +51,7 @@ $ */
#include <sys/mm.h>
#include <util/align.H>
#include <vector>
+#include <vfs/vfs.H>
trace_desc_t *g_trac_devtree = NULL;
TRAC_INIT(&g_trac_devtree, "DEVTREE", 4096);
@@ -155,9 +156,6 @@ void bld_xscom_node(devTree * i_dt, dtOffset_t & i_parentNode,
uint64_t xscom_prop[2] = { l_xscomAddr, THIRTYTWO_GB};
i_dt->addPropertyCells64(xscomNode, "reg", xscom_prop, 2);
- /*MVPD -- TODO RTC 88002 add full MVPD here*/
- //i_dt->addPropertyBytes(xscomNode, "ibm,module-vpd", ....);
-
/*PSI Host Bridge*/
uint32_t l_psiInfo = 0x2010900; /*PSI Host Bridge Scom addr*/
dtOffset_t psiNode = i_dt->addNode(xscomNode, "psihb", l_psiInfo);
@@ -177,10 +175,19 @@ void bld_xscom_node(devTree * i_dt, dtOffset_t & i_parentNode,
uint32_t tod_prop[2] = { l_todInfo, 0x34 }; //# of scoms in range
i_dt->addPropertyCells32(todNode, "reg", tod_prop, 2);
- if(i_chipid == 0x0) //Master chip
+ //Mark TOD pri/sec
+ uint8_t l_role = i_pProc->getAttr<ATTR_TOD_ROLE>();
+ if(l_role & TARGETING::TOD_ROLE_PRIMARY)
+ {
+ i_dt->addProperty(todNode, "primary");
+ }
+ if(l_role & TARGETING::TOD_ROLE_SECONDARY)
{
- i_dt->addProperty(todNode, "primary"); //TODO RTC 88002
+ i_dt->addProperty(todNode, "secondary");
+ }
+ if(i_chipid == 0x0) //Master chip
+ {
uint32_t l_lpcInfo = 0xB0020; /*ECCB FW addr*/
dtOffset_t lpcNode = i_dt->addNode(xscomNode,"lpc",l_lpcInfo);
i_dt->addPropertyString(lpcNode, "compatible", "ibm,power8-lpc");
@@ -361,8 +368,8 @@ uint32_t bld_cpu_node(devTree * i_dt, dtOffset_t & i_parentNode,
i_dt->addPropertyCell32(cpuNode, "ibm,purr", 1);
i_dt->addPropertyCell32(cpuNode, "ibm,spurr", 1);
- //TODO RTC88002 -- move this to nominal once HB has nominal freq
- uint64_t freq = sys->getAttr<TARGETING::ATTR_BOOT_FREQ_MHZ>();
+ //Set Nominal freq
+ uint64_t freq = sys->getAttr<TARGETING::ATTR_NOMINAL_FREQ_MHZ>();
freq *= MHZ;
uint32_t ex_freq[2] = {static_cast<uint32_t>(freq >> 32),
diff --git a/src/usr/hwpf/hwp/tod_init/TodHwpIntf.C b/src/usr/hwpf/hwp/tod_init/TodHwpIntf.C
index 6a4a08574..55ddd8c3f 100755
--- a/src/usr/hwpf/hwp/tod_init/TodHwpIntf.C
+++ b/src/usr/hwpf/hwp/tod_init/TodHwpIntf.C
@@ -5,7 +5,7 @@
/* */
/* IBM CONFIDENTIAL */
/* */
-/* COPYRIGHT International Business Machines Corp. 2013 */
+/* COPYRIGHT International Business Machines Corp. 2013,2014 */
/* */
/* p1 */
/* */
@@ -90,6 +90,23 @@ errlHndl_t todSetupHwp(const proc_tod_setup_tod_sel i_topologyType)
l_pMDMT->getBusIn(), l_pMDMT->getBusOut());
break;
}
+
+ //Mark the MDMT role in ATTR. Note the same chip
+ //can be both primary/secondary. Attr is volatile
+ //init'ed to zero
+ TARGETING::Target * l_proc =
+ const_cast<TARGETING::Target*>(l_pMDMT->getTarget());
+ uint8_t l_role = l_proc->getAttr<TARGETING::ATTR_TOD_ROLE>();
+ if (TOD_PRIMARY == i_topologyType)
+ {
+ l_role |= TARGETING::TOD_ROLE_PRIMARY;
+ }
+ else //Secondary
+ {
+ l_role |= TARGETING::TOD_ROLE_SECONDARY;
+ }
+ l_proc->setAttr<TARGETING::ATTR_TOD_ROLE>(l_role);
+
}while(0);
TOD_EXIT("todSetupHwp. errHdl = %p", l_errHdl);
diff --git a/src/usr/hwpf/hwp/tod_init/tod_init.C b/src/usr/hwpf/hwp/tod_init/tod_init.C
index 3f7ea8290..4e2ecb44e 100644
--- a/src/usr/hwpf/hwp/tod_init/tod_init.C
+++ b/src/usr/hwpf/hwp/tod_init/tod_init.C
@@ -5,7 +5,7 @@
/* */
/* IBM CONFIDENTIAL */
/* */
-/* COPYRIGHT International Business Machines Corp. 2013 */
+/* COPYRIGHT International Business Machines Corp. 2013,2014 */
/* */
/* p1 */
/* */
diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml
index 96d21449c..424a176cf 100644
--- a/src/usr/targeting/common/xmltohb/attribute_types.xml
+++ b/src/usr/targeting/common/xmltohb/attribute_types.xml
@@ -13379,6 +13379,40 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript
</hwpfToHbAttrMap>
</attribute>
+
+<enumerationType>
+ <id>TOD_ROLE</id>
+ <description>
+ Enumeration indicating what role this chip has in tod topology
+ </description>
+ <enumerator>
+ <name>NON_MASTER</name>
+ <value>0</value>
+ </enumerator>
+ <enumerator>
+ <name>PRIMARY</name>
+ <value>1</value>
+ </enumerator>
+ <enumerator>
+ <name>SECONDARY</name>
+ <value>2</value>
+ </enumerator>
+ <default>NON_MASTER</default>
+</enumerationType>
+
+<attribute>
+ <id>TOD_ROLE</id>
+ <description>
+ Bitmask indicating what role this chip has in tod topology
+ </description>
+ <simpleType>
+ <uint8_t></uint8_t>
+ </simpleType>
+ <persistency>volatile-zeroed</persistency>
+ <readable/>
+ <writeable/>
+</attribute>
+
</attributes>
diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml
index 2c5dec265..fb2db11cf 100644
--- a/src/usr/targeting/common/xmltohb/target_types.xml
+++ b/src/usr/targeting/common/xmltohb/target_types.xml
@@ -437,6 +437,8 @@
<attribute><id>PROC_MEM_SIZES_ACK</id></attribute>
<attribute><id>CPM_INFLECTION_POINTS</id></attribute>
<attribute><id>PROC_SELECT_BOOT_SEEPROM_IMAGE</id></attribute>
+ <attribute><id>TOD_ROLE</id></attribute>
+
</targetType>
<targetType>
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