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author | crgeddes <crgeddes@us.ibm.com> | 2017-05-31 17:53:09 -0500 |
---|---|---|
committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-06-05 22:24:07 -0400 |
commit | 24aed9157a24f7ce3e3cb6570fb69494415a78ec (patch) | |
tree | 922d7d8d14b0bb4f29349052e14c17eee8e0a29a /src/usr | |
parent | b83a8428ccd2acf88f865e8526e814ca1e45de3e (diff) | |
download | talos-hostboot-24aed9157a24f7ce3e3cb6570fb69494415a78ec.tar.gz talos-hostboot-24aed9157a24f7ce3e3cb6570fb69494415a78ec.zip |
Update LPC DD to set it's bar based upon what SBE tell us LPC bar is
Previously the value of the BARS was hard coded. We want to be able
to handle swapped memory. We will always just use what the SBE tells
us to use as LPC bar from now on.
Change-Id: I104463926c19763bd0bde8a0fd68ef3060157fe2
RTC: 173521
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41202
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr')
-rw-r--r-- | src/usr/lpc/lpcdd.C | 22 |
1 files changed, 14 insertions, 8 deletions
diff --git a/src/usr/lpc/lpcdd.C b/src/usr/lpc/lpcdd.C index fd1fa54e1..543086a28 100644 --- a/src/usr/lpc/lpcdd.C +++ b/src/usr/lpc/lpcdd.C @@ -30,6 +30,7 @@ */ #include <sys/mmio.h> +#include <sys/mm.h> #include <sys/task.h> #include <sys/sync.h> #include <string.h> @@ -44,6 +45,7 @@ #include <lpc/lpc_reasoncodes.H> #include <initservice/initserviceif.H> #include <kernel/console.H> //@todo - RTC:97495 -- Resolve console access +#include <kernel/bltohbdatamgr.H> #include <errl/errludlogregister.H> #include <initservice/taskargs.H> #include <config.h> @@ -385,8 +387,8 @@ void block_lpc_ops( bool i_block ) */ uint64_t get_lpc_bar( void ) { - //@todo-RTC:173521-Return live value - return MMIO_GROUP0_CHIP0_LPC_BASE_ADDR; + return mm_virt_to_phys( reinterpret_cast<void*>( + Singleton<LpcDD>::instance().getLPCBaseAddr() )); } @@ -407,16 +409,13 @@ LpcDD::LpcDD( TARGETING::Target* i_proc ) { TRACFCOMP(g_trac_lpc, "LpcDD::LpcDD> " ); mutex_init( &iv_mutex ); - LPCBase_t baseAddr = LPC::LPC_PHYS_BASE + LPC_ADDR_START; - - - setLPCBaseAddr( static_cast<uint64_t *>( - mmio_dev_map(reinterpret_cast<void *>(baseAddr), - LPC_SPACE_SIZE ))); + LPCBase_t baseAddr; if( i_proc == TARGETING::MASTER_PROCESSOR_CHIP_TARGET_SENTINEL ) { ivp_mutex = &cv_mutex; + //Retrieve the LPC phys base from the bootloader/hostboot data manager + baseAddr = g_BlToHbDataManager.getLpcBAR() + LPC_ADDR_START; } else { @@ -428,8 +427,15 @@ LpcDD::LpcDD( TARGETING::Target* i_proc ) // Just use the local mutex ivp_mutex = &iv_mutex; + + //Correct LPC_BUS address attribute should be correct for alt_lpcdd + baseAddr = i_proc->getAttr<TARGETING::ATTR_LPC_BUS_ADDR>() + LPC_ADDR_START; } + setLPCBaseAddr( static_cast<uint64_t *>( + mmio_dev_map(reinterpret_cast<void *>(baseAddr), + LPC_SPACE_SIZE ))); + //@todo RTC:126644 // Initialize the hardware // errlHndl_t l_errl = hwReset(LpcDD::RESET_INIT); |