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author | Zane Shelley <zshelle@us.ibm.com> | 2013-05-08 19:50:27 -0500 |
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committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2013-12-06 10:19:33 -0600 |
commit | d335bb99880212bd269d0c1a55e1f54b9571aaed (patch) | |
tree | 3334825717a28a5c20537153c2f1372995a7a24f /src/usr | |
parent | e5edea84ac6cc83cdc30b1b261d3c28be57d7da5 (diff) | |
download | talos-hostboot-d335bb99880212bd269d0c1a55e1f54b9571aaed.tar.gz talos-hostboot-d335bb99880212bd269d0c1a55e1f54b9571aaed.zip |
ATTN: Pass PRD Centaur instead of processor for channel failure
Currently, HostATTN will pass PRD the Centaur for recoverable and
special attentions, but pass the processor for channel failures reported
by the Centaur. The original reason for the different designs was never
valid in the first place and poorly designed. We are now seeing design
issues in PRD because of the current design so this commit will make
HostATTN pass PRD the Centaur for all attentions types reported by the
Centaur during Hostboot.
Change-Id: I19bd59c4c6efae127b914ff58be171cef1f12fab
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/4453
Tested-by: Jenkins Server
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: BENJAMIN J. WEISENBECK <bweisenb@us.ibm.com>
Reviewed-by: Christopher T. Phan <cphan@us.ibm.com>
Reviewed-by: Bilicon Patil <bilpatil@in.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr')
-rw-r--r-- | src/usr/diag/attn/attnbits.C | 4 | ||||
-rwxr-xr-x | src/usr/diag/prdf/common/plat/pegasus/Mcs.rule | 25 | ||||
-rw-r--r-- | src/usr/diag/prdf/test/prdfTest_CentCs.H | 2 | ||||
-rw-r--r-- | src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock.C | 4 |
4 files changed, 13 insertions, 22 deletions
diff --git a/src/usr/diag/attn/attnbits.C b/src/usr/diag/attn/attnbits.C index eeda5945d..ae7e71f5b 100644 --- a/src/usr/diag/attn/attnbits.C +++ b/src/usr/diag/attn/attnbits.C @@ -183,8 +183,8 @@ void getCheckbitsAssociations( { static const RegAssoc first[] = { - {RECOVERABLE, 0x0001000000000000ull}, - {SPECIAL, 0x0000C00000000000ull}, + {RECOVERABLE, 0x0009000000000000ull}, + {SPECIAL, 0x0000C00000000000ull}, }; static const RegAssoc * last = first + diff --git a/src/usr/diag/prdf/common/plat/pegasus/Mcs.rule b/src/usr/diag/prdf/common/plat/pegasus/Mcs.rule index 99e4ce24b..1d1b0c55c 100755 --- a/src/usr/diag/prdf/common/plat/pegasus/Mcs.rule +++ b/src/usr/diag/prdf/common/plat/pegasus/Mcs.rule @@ -237,13 +237,9 @@ group gMciFir attntype CHECK_STOP, RECOVERABLE, SPECIAL, UNIT_CS /** MCIFIR[12] * MCIFIRQ_CENTAUR_CHECKSTOP */ - # NOTE: When set, this bit will trigger MCIFIR[31] (channel checkstop). - # This bit will be set as a recoverable attention, so that PRD will - # be called to analyze the recoverable attention in the P8 and - # change then attention type to UNIT_CS because bit 31 is on. Then PRD - # will analyze the Centaur for the root case of the unit checkstop. - # NOTE: This bit will be masked at runtime. - (MciFir, bit(12)) ? analyzeConnectedCentaur; + # NOTE: This bit will be set to host_attn and only monitored by HostATTN + # during Hostboot. + (MciFir, bit(12)) ? defaultMaskedError; /** MCIFIR[13] * MCIFIRQ_CENTAUR_TRACESTOP @@ -258,22 +254,22 @@ group gMciFir attntype CHECK_STOP, RECOVERABLE, SPECIAL, UNIT_CS /** MCIFIR[15] * MCIFIRQ_CENTAUR_RECOVERABLE_ERROR */ - # NOTE: This bit will be set to host_attn during hostboot and masked at - # runtime. + # NOTE: This bit will be set to host_attn and only monitored by HostATTN + # during Hostboot. (MciFir, bit(15)) ? defaultMaskedError; /** MCIFIR[16] * MCIFIRQ_CENTAUR_SPECIAL_ATTENTION */ - # NOTE: This bit will be set to host_attn during hostboot and masked at - # runtime. + # NOTE: This bit will be set to host_attn and only monitored by HostATTN + # during Hostboot. (MciFir, bit(16)) ? defaultMaskedError; /** MCIFIR[17] * MCIFIRQ_CENTAUR_MAINTENANCE_COMPLETE */ - # NOTE: This bit will be set to host_attn during hostboot and masked at - # runtime. + # NOTE: This bit will be set to host_attn and only monitored by HostATTN + # during Hostboot. (MciFir, bit(17)) ? defaultMaskedError; /** MCIFIR[18] @@ -447,9 +443,6 @@ group gMciFir attntype CHECK_STOP, RECOVERABLE, SPECIAL, UNIT_CS # Include the common action set. .include "CommonActions.rule" -/** Analyze the connected Centaur */ -actionclass analyzeConnectedCentaur { analyze(connected(TYPE_MEMBUF)); }; - actionclass calloutProcHighThr5PerHr { callout(connected(TYPE_PROC),MRU_HIGH); diff --git a/src/usr/diag/prdf/test/prdfTest_CentCs.H b/src/usr/diag/prdf/test/prdfTest_CentCs.H index 65bc68665..fa38063f0 100644 --- a/src/usr/diag/prdf/test/prdfTest_CentCs.H +++ b/src/usr/diag/prdf/test/prdfTest_CentCs.H @@ -45,7 +45,7 @@ class CentaurCS:public CxxTest::TestSuite void TestCentaurCheckstop(void) { PRDS_BEGIN("Centaur CS"); - PRDS_ERROR_ENTRY("NODE{0}:PROC{0}", PRDF::RECOVERABLE); + PRDS_ERROR_ENTRY("NODE{0}:MEMBUF{4}", PRDF::RECOVERABLE); PRDS_EXPECTED_SIGNATURE("NODE{0}:MEMBUF{4}:MBA{0}", 0x43F10003); // GLOBAL_RE_FIR set bit 1 diff --git a/src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock.C b/src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock.C index db053327d..09308a7d2 100644 --- a/src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock.C +++ b/src/usr/hwpf/hwp/dmi_training/proc_cen_framelock/proc_cen_framelock.C @@ -1869,9 +1869,8 @@ fapi::ReturnCode proc_cen_framelock(const fapi::Target& i_pu_target, // Set P8 MCI FIR ACT0 // Set action regs to recoverable interrupt (action0=1, action1=0) for MCIFIR's 12,15,16 and 17 - // On 4/25/2013, PRD asked to change bit 12 action from recov intr to recover error l_ecmdRc |= mci_data.flushTo0(); - // l_ecmdRc |= mci_data.setBit(12); //Centaur Checkstop + l_ecmdRc |= mci_data.setBit(12); //Centaur Checkstop l_ecmdRc |= mci_data.setBit(15); //Centaur Recoverable Attention l_ecmdRc |= mci_data.setBit(16); //Centaur Special Attention l_ecmdRc |= mci_data.setBit(17); //Centaur Maintenance Complete @@ -1901,7 +1900,6 @@ fapi::ReturnCode proc_cen_framelock(const fapi::Target& i_pu_target, l_ecmdRc |= mci_data.setBit(8); //MCI Internal Control Parity Error l_ecmdRc |= mci_data.setBit(9); //MCI Data Flow Parity Error l_ecmdRc |= mci_data.setBit(10); //CRC Performance Degradation - l_ecmdRc |= mci_data.setBit(12); //Centaur Checkstop l_ecmdRc |= mci_data.setBit(20); //Scom Register parity error l_ecmdRc |= mci_data.setBit(22); //mcicfgq parity error l_ecmdRc |= mci_data.setBit(23); //Replay Buffer Overrun |