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authorMike Baiocchi <mbaiocch@us.ibm.com>2017-12-21 10:27:52 -0600
committerWilliam G. Hoffa <wghoffa@us.ibm.com>2017-12-22 17:13:02 -0500
commitf43013e577253e27cc5c325790813f800801be1d (patch)
tree7dcd48d636244a990c6ce5fa243d217521cce903 /src/usr/util
parent296cd5865b39f7bac06a9b11add74fe095f364ef (diff)
downloadtalos-hostboot-f43013e577253e27cc5c325790813f800801be1d.tar.gz
talos-hostboot-f43013e577253e27cc5c325790813f800801be1d.zip
Send FSP relevant information for PSI Diagnotics test when TCEs are enabled
This commit sovles the Hostboot side of Defect SW411967 where the FSP needs to know the real memory address associated with the PAYLOAD TCE Tokens so that it can run the PSI Diagnostics test. The hostboot code will also temporarily open an unsecure memory region for this test, as well. Change-Id: Id906e6570beeefbc23a26b2c2421684e8d2f9c2d Backport:release-fips910 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51249 Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/usr/util')
-rw-r--r--src/usr/util/utiltcemgr.C36
1 files changed, 34 insertions, 2 deletions
diff --git a/src/usr/util/utiltcemgr.C b/src/usr/util/utiltcemgr.C
index 1f67606a9..4f82e71b0 100644
--- a/src/usr/util/utiltcemgr.C
+++ b/src/usr/util/utiltcemgr.C
@@ -48,6 +48,7 @@
#include <targeting/common/targetservice.H>
#include <devicefw/userif.H>
#include <initservice/initserviceif.H>
+#include <sbeio/sbeioif.H>
trace_desc_t* g_trac_tce = nullptr;
TRAC_INIT(&g_trac_tce, UTILTCE_TRACE_NAME, 4*KILOBYTE);
@@ -160,6 +161,24 @@ errlHndl_t utilSetupPayloadTces(void)
Singleton<UtilTceMgr>::instance().setToken(UtilTceMgr::PAYLOAD_TOKEN,
token);
+ // For PSI Diagnostics Test the FSP writes and reads back patterns to the
+ // PAYLOAD section via PSI and FSI so it needs to know the starting memory
+ // address of this section and have an unsecure read-write memory region
+ // opened for it
+ sys->setAttr<TARGETING::ATTR_START_MEM_ADDRESS_FOR_PAYLOAD_TCE_TOKEN>(addr);
+
+ // Open Read-Write Unsecure Memory Region
+ errl = SBEIO::openUnsecureMemRegion(addr,
+ size,
+ true, //Read-Write
+ nullptr); //Master Processor
+
+ if (errl)
+ {
+ TRACFCOMP(g_trac_tce,"utilSetupPayloadTces(): ERROR back from SBEIO::openUnsecureMemRegion() for PAYLOAD using addr=0x%.16llX, size=0x%llX", addr, size);
+ break;
+ }
+
// Allocate TCEs for HDAT
addr = HDAT_TMP_ADDR;
size = HDAT_TMP_SIZE;
@@ -199,7 +218,8 @@ errlHndl_t utilClosePayloadTces(void)
TRACFCOMP(g_trac_tce,ENTER_MRK"utilClosePayloadTces()");
- // size is a constant for PAYLOAD
+ // Close PAYLOAD TCEs
+ // -- size is a constant for PAYLOAD
size = MCL_TMP_SIZE;
token = Singleton<UtilTceMgr>::instance().getToken(UtilTceMgr::PAYLOAD_TOKEN);
errl = utilDeallocateTces(token, size);
@@ -209,7 +229,19 @@ errlHndl_t utilClosePayloadTces(void)
break;
}
- // size is a constant for HDAT
+ // Close the Unsecure Memory Region that was opened for the FSP to run
+ // PSI Diagnostics Test using the PAYLOAD section
+ // -- addr is a constant for PAYLOAD
+ errl = SBEIO::closeUnsecureMemRegion(MCL_TMP_ADDR,
+ nullptr); //Master Processor
+ if(errl)
+ {
+ TRACFCOMP(g_trac_tce,"utilClosePayloadTces(): ERROR back from closeUnsecureMemRegion() using start address=0x%016llX",MCL_TMP_ADDR);
+ break;
+ }
+
+ // Close HDAT TCEs
+ // --size is a constant for HDAT
size = HDAT_TMP_SIZE;
token = Singleton<UtilTceMgr>::instance().getToken(UtilTceMgr::HDAT_TOKEN);
errl = utilDeallocateTces(token, size);
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