diff options
author | Mike Jones <mjjones@us.ibm.com> | 2012-01-03 10:33:01 -0600 |
---|---|---|
committer | MIKE J. JONES <mjjones@us.ibm.com> | 2012-01-09 08:45:28 -0600 |
commit | a8ac662f8643211032077043eace4b92108fc5fe (patch) | |
tree | a6711b7173ea44e2fc9c2f8f13c127bf21ec1a70 /src/usr/targeting | |
parent | 7de0708eac63bb81786c2a5e794c5d6fbef069c4 (diff) | |
download | talos-hostboot-a8ac662f8643211032077043eace4b92108fc5fe.tar.gz talos-hostboot-a8ac662f8643211032077043eace4b92108fc5fe.zip |
HWPF: Add support for memory HWPF attributes
Change-Id: I945224b9d4acf25730b5c9c8bee384b6a3669104
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/588
Tested-by: Jenkins Server
Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com>
Diffstat (limited to 'src/usr/targeting')
-rw-r--r-- | src/usr/targeting/attrrp.C | 6 | ||||
-rw-r--r-- | src/usr/targeting/target.C | 1 | ||||
-rw-r--r-- | src/usr/targeting/xmltohb/attribute_types.xml | 1538 | ||||
-rw-r--r-- | src/usr/targeting/xmltohb/makefile | 22 | ||||
-rwxr-xr-x | src/usr/targeting/xmltohb/mergexml.sh | 2 | ||||
-rw-r--r-- | src/usr/targeting/xmltohb/target_types.xml | 88 | ||||
-rwxr-xr-x | src/usr/targeting/xmltohb/xmltohb.pl | 27 |
7 files changed, 1631 insertions, 53 deletions
diff --git a/src/usr/targeting/attrrp.C b/src/usr/targeting/attrrp.C index 8c2d43731..5bdf42c41 100644 --- a/src/usr/targeting/attrrp.C +++ b/src/usr/targeting/attrrp.C @@ -133,7 +133,7 @@ namespace TARGETING void* pAddr = reinterpret_cast<void*>(msg->data[1]); TRACFCOMP(g_trac_targeting, INFO_MRK "AttrRP: Message recv'd: " - "%d, %lx %p", msg->type, vAddr, pAddr); + "0x%x, 0x%lx 0x%p", msg->type, vAddr, pAddr); // Locate corresponding attribute section for message. ssize_t section = -1; @@ -329,8 +329,8 @@ namespace TARGETING l_section->sectionOffset; iv_sections[i].size = l_section->sectionSize; - TRACDCOMP(g_trac_targeting, - "Decoded Attribute Section: %d, %lx %lx %d", + TRACFCOMP(g_trac_targeting, + "Decoded Attribute Section: %d, 0x%lx 0x%lx 0x%lx", iv_sections[i].type, iv_sections[i].vmmAddress, iv_sections[i].pnorAddress, diff --git a/src/usr/targeting/target.C b/src/usr/targeting/target.C index d6946e050..714e614bd 100644 --- a/src/usr/targeting/target.C +++ b/src/usr/targeting/target.C @@ -117,6 +117,7 @@ void Target::_getAttrPtr( if ((*iv_pAttrNames)[i] == i_attr) { l_pAttr = (*iv_pAttrValues)[i]; + break; } } o_pAttr = l_pAttr; diff --git a/src/usr/targeting/xmltohb/attribute_types.xml b/src/usr/targeting/xmltohb/attribute_types.xml index b09981b72..d823e291f 100644 --- a/src/usr/targeting/xmltohb/attribute_types.xml +++ b/src/usr/targeting/xmltohb/attribute_types.xml @@ -831,24 +831,6 @@ <writeable/> </attribute> -<attribute> - <id>MSS_EFF_PRIMARY_RANK</id> - <description>The effective rank group on each port (0 to 3) for each group 0-3</description> - <simpleType> - <uint8_t> - <default>0</default> - </uint8_t> - <array>4, 4</array> - </simpleType> - <persistency>volatile-zeroed</persistency> - <readable/> - <writeable/> - <hwpfToHbAttrMap> - <id>ATTR_MSS_EFF_PRIMARY_RANK</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - <!-- For POD Testing --> <attribute> <id>NUMERIC_POD_TYPE_TEST</id> @@ -1067,5 +1049,1523 @@ <writeable/> </attribute> -</attributes> +<attribute> + <id>MSS_VOLT</id> + <description>DRAM Voltage. Initialized and used by HWPs.</description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_VOLT</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_FREQ</id> + <description>Frequency of memory channel in MHz. Initialized and used by HWPs.</description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_FREQ</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_DIMM_MFG_ID_CODE</id> + <description>DIMM Manufacturer ID Code. Initialized and used by HWPs.</description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + <array>2,2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_DIMM_MFG_ID_CODE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DIMM_RANKS_CONFIGED</id> + <description>DIMM ranks configured. Initialized and used by HWPs.</description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + <array>2,2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DIMM_RANKS_CONFIGED</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_NUM_RANKS_PER_DIMM</id> + <description>Number of ranks per DIMM. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>2,2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_NUM_RANKS_PER_DIMM</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DIMM_TYPE</id> + <description>Type of DIMM. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DIMM_TYPE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_WIDTH</id> + <description>DRAM Device Width. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_WIDTH</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_GEN</id> + <description>DRAM Generation. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_GEN</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_PRIMARY_RANK_GROUP0</id> + <description>Primary RankGroup0. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_PRIMARY_RANK_GROUP0</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_PRIMARY_RANK_GROUP1</id> + <description>Primary RankGroup1. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_PRIMARY_RANK_GROUP1</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_PRIMARY_RANK_GROUP2</id> + <description>Primary RankGroup2. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_PRIMARY_RANK_GROUP2</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> +<attribute> + <id>EFF_PRIMARY_RANK_GROUP3</id> + <description>Primary RankGroup3. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_PRIMARY_RANK_GROUP3</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_SECONDARY_RANK_GROUP0</id> + <description>Secondary RankGroup0. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_SECONDARY_RANK_GROUP0</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_SECONDARY_RANK_GROUP1</id> + <description>Secondary RankGroup1. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_SECONDARY_RANK_GROUP1</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_SECONDARY_RANK_GROUP2</id> + <description>Secondary RankGroup2. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_SECONDARY_RANK_GROUP2</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_SECONDARY_RANK_GROUP3</id> + <description>Secondary RankGroup3. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_SECONDARY_RANK_GROUP3</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_TERTIARY_RANK_GROUP0</id> + <description>Tertiary RankGroup0. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_TERTIARY_RANK_GROUP0</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_TERTIARY_RANK_GROUP1</id> + <description>Tertiary RankGroup1. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_TERTIARY_RANK_GROUP1</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_TERTIARY_RANK_GROUP2</id> + <description>Tertiary RankGroup2. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_TERTIARY_RANK_GROUP2</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_TERTIARY_RANK_GROUP3</id> + <description>Tertiary RankGroup3. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_TERTIARY_RANK_GROUP3</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_QUATERNARY_RANK_GROUP0</id> + <description>Quaternary RankGroup0. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_QUATERNARY_RANK_GROUP0</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_QUATERNARY_RANK_GROUP1</id> + <description>Quaternary RankGroup1. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_QUATERNARY_RANK_GROUP1</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_QUATERNARY_RANK_GROUP2</id> + <description>Quaternary RankGroup2. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_QUATERNARY_RANK_GROUP2</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_QUATERNARY_RANK_GROUP3</id> + <description>Quaternary RankGroup3. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_QUATERNARY_RANK_GROUP3</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_ODT_RD</id> + <description>Rank Read ODT. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>2,2,4</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_ODT_RD</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_ODT_WR</id> + <description>Rank Write ODT. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>2,2,4</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_ODT_WR</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_RON</id> + <description>DRAM Ron. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>2,2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_RON</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_RTT_NOM</id> + <description>DRAM Rtt_Nom. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>2,2,4</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_RTT_NOM</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_RTT_WR</id> + <description>DRAM Rtt_WR. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>2,2,4</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_RTT_WR</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_WR_VREF</id> + <description>DRAM Write Vref. Initialized and used by HWPs.</description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_WR_VREF</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_CEN_DRV_IMP_DQ_DQS</id> + <description>Centaur DQ and DQS Drive Impedance. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_CEN_DRV_IMP_DQ_DQS</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_CEN_DRV_IMP_CMD</id> + <description>Centaur Command Drive Impedance. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_CEN_DRV_IMP_CMD</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_CEN_DRV_IMP_CNTL</id> + <description>Centaur Control Drive Impedance. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_CEN_DRV_IMP_CNTL</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_CEN_RCV_IMP_DQ_DQS</id> + <description>Centaur DQ and DQS Receiver Impedance. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_CEN_RCV_IMP_DQ_DQS</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_CEN_SLEW_RATE_DQ</id> + <description>Centaur DQ Slew Rate. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_CEN_SLEW_RATE_DQ</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_CEN_SLEW_RATE_DQS</id> + <description>Centaur DQS Slew Rate. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_CEN_SLEW_RATE_DQS</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_CEN_SLEW_RATE_CMD</id> + <description>Centaur Command Slew Rate. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_CEN_SLEW_RATE_CMD</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_CEN_SLEW_RATE_CNTL</id> + <description>Centaur Control Slew Rate. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_CEN_SLEW_RATE_CNTL</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_CEN_RD_VREF</id> + <description>Centaur Read Vref. Initialized and used by HWPs.</description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_CEN_RD_VREF</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DIMM_SIZE</id> + <description>DIMM Size. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + <array>2,2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DIMM_SIZE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_BANKS</id> + <description>Number of DRAM banks. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_BANKS</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_ROWS</id> + <description>Number of DRAM rows. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_ROWS</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_COLS</id> + <description>Number of DRAM columns. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_COLS</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_DENSITY</id> + <description>DRAM Density. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_DENSITY</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_TRCD</id> + <description>DRAM RAS to CAS Delay. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_TRCD</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_TRRD</id> + <description>DRAM Row ACT to Row ACT Delay. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_TRRD</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_TRP</id> + <description>DRAM Row Precharge Delay. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_TRP</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_TRAS</id> + <description>DRAM ACT to Precharge Delay. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_TRAS</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_TRC</id> + <description>DRAM ACT to ACT/Refresh Delay. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_TRC</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_TRFC</id> + <description>DRAM Refresh Recovery Delay. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_TRFC</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_TWTR</id> + <description>DRAM Internal Write to Read Delay. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_TWTR</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_TRTP</id> + <description>DRAM Internal Read to Precharge Delay. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_TRTP</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_TFAW</id> + <description>DRAM Four ACT Window Delay. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_TFAW</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_BL</id> + <description>DRAM Burst Length. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_BL</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_CL</id> + <description>DRAM CAS Latency. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_CL</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_AL</id> + <description>DRAM Additive Latency. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_AL</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_CWL</id> + <description>DRAM CAS Write Latency. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_CWL</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_RBT</id> + <description>DRAM Read Burst Type. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_RBT</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_TM</id> + <description>DRAM Test Mode. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_TM</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_DLL_RESET</id> + <description>DRAM DLL Reset. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_DLL_RESET</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_WR</id> + <description>DRAM Write Recovery. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_WR</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_DLL_PPD</id> + <description>DRAM DLL Precharge PD. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_DLL_PPD</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_DLL_ENABLE</id> + <description>DRAM DLL Enable. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_DLL_ENABLE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_TDQS</id> + <description>DRAM TDQS. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_TDQS</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_WR_LVL_ENABLE</id> + <description>DRAM Write Level Enable. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_WR_LVL_ENABLE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_OUTPUT_BUFFER</id> + <description>DRAM output buffer. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_OUTPUT_BUFFER</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_PASR</id> + <description>DRAM Partial Array Self-Refresh. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_PASR</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_ASR</id> + <description>DRAM Auto Self-Refresh. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_ASR</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DRAM_SRT</id> + <description>DRAM Self-Refresh Temperature Range. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DRAM_SRT</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_MPR_LOC</id> + <description>Multi Purpose Register Location. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_MPR_LOC</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_MPR_MODE</id> + <description>Multi Purpose Register Mode. Initialized and used by HWPs.</description> + <simpleType> + <uint8_t> + <default>0</default> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_MPR_MODE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>EFF_DIMM_RCD_CNTL_WORD_0_15</id> + <description>DIMM RCD Control Word. Initialized and used by HWPs.</description> + <simpleType> + <uint64_t> + <default>0</default> + </uint64_t> + <array>2,2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_EFF_DIMM_RCD_CNTL_WORD_0_15</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_THROTTLE_NUMERATOR</id> + <description>DIMM throttle numerator. Initialized and used by HWPs.</description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + <array>2,2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_THROTTLE_NUMERATOR</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_THROTTLE_DENOMINATOR</id> + <description>DIMM throttle denominator. Initialized and used by HWPs.</description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + <array>2,2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_THROTTLE_DENOMINATOR</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_THROTTLE_CHANNEL_NUMERATOR</id> + <description>Channel throttle numerator. Initialized and used by HWPs.</description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + <array>2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_THROTTLE_CHANNEL_NUMERATOR</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_THROTTLE_CHANNEL_DENOMINATOR</id> + <description>Channel throttle denominator. Initialized and used by HWPs.</description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + <array>2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_THROTTLE_CHANNEL_DENOMINATOR</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_WATT_TARGET</id> + <description>Channel total memory watts. Initialized and used by HWPs.</description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + <array>2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_WATT_TARGET</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_POWER_SLOPE</id> + <description>DIMM Power slope value. Initialized and used by HWPs.</description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + <array>2,2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_POWER_SLOPE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_POWER_INT</id> + <description>DIMM Power intercept value. Initialized and used by HWPs.</description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + <array>2,2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_POWER_INT</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_DIMM_MAXBANDWIDTH_GBS</id> + <description>DIMM Max Bandwidth in GBs. Initialized and used by HWPs.</description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + <array>2,2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_DIMM_MAXBANDWIDTH_GBS</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_DIMM_MAXBANDWIDTH_MRS</id> + <description>DIMM Max Bandwidth in MRs. Initialized and used by HWPs.</description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + <array>2,2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_DIMM_MAXBANDWIDTH_MRS</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_CHANNEL_MAXBANDWIDTH_GBS</id> + <description>Channel Max Bandwidth in GBs. Initialized and used by HWPs.</description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + <array>2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_CHANNEL_MAXBANDWIDTH_GBS</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_CHANNEL_MAXBANDWIDTH_MRS</id> + <description>Channel Max Bandwidth MRs. Initialized and used by HWPs.</description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + <array>2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_CHANNEL_MAXBANDWIDTH_MRS</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_DIMM_MAXPOWER</id> + <description>DIMM Max Power output. Initialized and used by HWPs.</description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + <array>2,2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_DIMM_MAXPOWER</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_CHANNEL_MAXPOWER</id> + <description>Channel Max Power output. Initialized and used by HWPs.</description> + <simpleType> + <uint32_t> + <default>0</default> + </uint32_t> + <array>2</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_CHANNEL_MAXPOWER</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_MEMSIZE</id> + <description>The amount of memory to set aside for this memory controller. Initialized by HWP.</description> + <simpleType> + <uint64_t> + <default>0</default> + </uint64_t> + <array>8</array> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_MEMSIZE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MSS_MEMSIZE_MBA</id> + <description>At the MBA level, how much memory is available. Initialized by HWP.</description> + <simpleType> + <uint64_t> + <default>0</default> + </uint64_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_MEMSIZE_MBA</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +</attributes> diff --git a/src/usr/targeting/xmltohb/makefile b/src/usr/targeting/xmltohb/makefile index b6234fc60..4e61e142f 100644 --- a/src/usr/targeting/xmltohb/makefile +++ b/src/usr/targeting/xmltohb/makefile @@ -46,7 +46,8 @@ XMLTOHB_TARGETS = \ XMLTOHB_GENERIC_SOURCES = attribute_types.xml target_types.xml XMLTOHB_FAPIATTR_SOURCES = \ - ${ROOTPATH}/src/usr/hwpf/hwp/fapiHwpAttributeInfo.xml + ${ROOTPATH}/src/usr/hwpf/hwp/fapiHwpAttributeInfo.xml \ + ${ROOTPATH}/src/usr/hwpf/hwp/memory_attributes.xml VMM_CONSTS_FILE = \ ${ROOTPATH}/src/include/usr/vmmconst.h @@ -57,7 +58,7 @@ EXTRA_PARTS = $(addprefix $(IMGDIR)/, $(XMLTOHB_SYSTEM_BINARIES)) EXTRA_CLEAN = $(addprefix $(GENDIR)/, ${XMLTOHB_SYSTEM_BINARIES}) \ $(addprefix $(GENDIR)/, ${XMLTOHB_SYSTEM_BINARIES:.bin=.xml}) \ - ${GENDIR}/generic.xml + ${GENDIR}/generic.xml ${GENDIR}/fapiattrs.xml include ${ROOTPATH}/config.mk @@ -71,12 +72,15 @@ ${EXTRA_PARTS}: ${IMGDIR}/% : ${GENDIR}/% ${GENDIR}/generic.xml: ${XMLTOHB_GENERIC_SOURCES} ./mergexml.sh $^ > $@ +# merge all FAPI attribute files into one +${GENDIR}/fapiattrs.xml: ${XMLTOHB_FAPIATTR_SOURCES} + ./mergexml.sh $^ > $@ + # create the header files, only needs generic xml $(call GENTARGET,$(XMLTOHB_TARGETS)) : \ - xmltohb.pl ${GENDIR}/generic.xml ${XMLTOHB_FAPIATTR_SOURCES} + xmltohb.pl ${GENDIR}/generic.xml ${GENDIR}/fapiattrs.xml ./$< $(addprefix --hb-xml-file=,${GENDIR}/generic.xml) \ - $(addprefix --fapi-attributes-xml-file=,\ - ${XMLTOHB_FAPIATTR_SOURCES}) \ + $(addprefix --fapi-attributes-xml-file=,${GENDIR}/fapiattrs.xml) \ --src-output-dir=$(dir $@) --img-output-dir=none \ --img-output-file=none @@ -85,14 +89,10 @@ ${GENDIR}/%.hb.xml: %.system.xml ${XMLTOHB_GENERIC_SOURCES} ./mergexml.sh $^ > $@ # create the binary files -${GENDIR}/%_targeting.bin: xmltohb.pl ${GENDIR}/%.hb.xml ${XMLTOHB_FAPIATTR_SOURCES} ${VMM_CONSTS_FILE} +${GENDIR}/%_targeting.bin: xmltohb.pl ${GENDIR}/%.hb.xml ${GENDIR}/fapiattrs.xml ${VMM_CONSTS_FILE} ./$< $(addprefix --hb-xml-file=,${GENDIR}/$*.hb.xml) \ - $(addprefix --fapi-attributes-xml-file=,\ - ${XMLTOHB_FAPIATTR_SOURCES}) \ + $(addprefix --fapi-attributes-xml-file=,${GENDIR}/fapiattrs.xml) \ --src-output-dir=none --img-output-dir=$(dir $@) \ --img-output-file=$(notdir $@) \ --vmm-consts-file=$(VMM_CONSTS_FILE) - - - diff --git a/src/usr/targeting/xmltohb/mergexml.sh b/src/usr/targeting/xmltohb/mergexml.sh index acb2f08a2..2d73d0d6b 100755 --- a/src/usr/targeting/xmltohb/mergexml.sh +++ b/src/usr/targeting/xmltohb/mergexml.sh @@ -22,5 +22,5 @@ # # IBM_PROLOG_END echo "<attributes>" -cat $* | grep -v "attributes" | grep -v "</attributes>" +cat $* | grep -v "<attributes>" | grep -v "</attributes>" echo "</attributes>" diff --git a/src/usr/targeting/xmltohb/target_types.xml b/src/usr/targeting/xmltohb/target_types.xml index 808637f05..83839d509 100644 --- a/src/usr/targeting/xmltohb/target_types.xml +++ b/src/usr/targeting/xmltohb/target_types.xml @@ -423,7 +423,90 @@ <id>TYPE</id> <default>MBA</default> </attribute> - <attribute><id>MSS_EFF_PRIMARY_RANK</id></attribute> + <attribute><id>MSS_DIMM_MFG_ID_CODE</id></attribute> + <attribute><id>EFF_DIMM_RANKS_CONFIGED</id></attribute> + <attribute><id>EFF_NUM_RANKS_PER_DIMM</id></attribute> + <attribute><id>EFF_DIMM_TYPE</id></attribute> + <attribute><id>EFF_DRAM_WIDTH</id></attribute> + <attribute><id>EFF_DRAM_GEN</id></attribute> + <attribute><id>EFF_PRIMARY_RANK_GROUP0</id></attribute> + <attribute><id>EFF_PRIMARY_RANK_GROUP1</id></attribute> + <attribute><id>EFF_PRIMARY_RANK_GROUP2</id></attribute> + <attribute><id>EFF_PRIMARY_RANK_GROUP3</id></attribute> + <attribute><id>EFF_SECONDARY_RANK_GROUP0</id></attribute> + <attribute><id>EFF_SECONDARY_RANK_GROUP1</id></attribute> + <attribute><id>EFF_SECONDARY_RANK_GROUP2</id></attribute> + <attribute><id>EFF_SECONDARY_RANK_GROUP3</id></attribute> + <attribute><id>EFF_TERTIARY_RANK_GROUP0</id></attribute> + <attribute><id>EFF_TERTIARY_RANK_GROUP1</id></attribute> + <attribute><id>EFF_TERTIARY_RANK_GROUP2</id></attribute> + <attribute><id>EFF_TERTIARY_RANK_GROUP3</id></attribute> + <attribute><id>EFF_QUATERNARY_RANK_GROUP0</id></attribute> + <attribute><id>EFF_QUATERNARY_RANK_GROUP1</id></attribute> + <attribute><id>EFF_QUATERNARY_RANK_GROUP2</id></attribute> + <attribute><id>EFF_QUATERNARY_RANK_GROUP3</id></attribute> + <attribute><id>EFF_ODT_RD</id></attribute> + <attribute><id>EFF_ODT_WR</id></attribute> + <attribute><id>EFF_DRAM_RON</id></attribute> + <attribute><id>EFF_DRAM_RTT_NOM</id></attribute> + <attribute><id>EFF_DRAM_RTT_WR</id></attribute> + <attribute><id>EFF_DRAM_WR_VREF</id></attribute> + <attribute><id>EFF_CEN_DRV_IMP_DQ_DQS</id></attribute> + <attribute><id>EFF_CEN_DRV_IMP_CMD</id></attribute> + <attribute><id>EFF_CEN_DRV_IMP_CNTL</id></attribute> + <attribute><id>EFF_CEN_RCV_IMP_DQ_DQS</id></attribute> + <attribute><id>EFF_CEN_SLEW_RATE_DQ</id></attribute> + <attribute><id>EFF_CEN_SLEW_RATE_DQS</id></attribute> + <attribute><id>EFF_CEN_SLEW_RATE_CMD</id></attribute> + <attribute><id>EFF_CEN_SLEW_RATE_CNTL</id></attribute> + <attribute><id>EFF_CEN_RD_VREF</id></attribute> + <attribute><id>EFF_DIMM_SIZE</id></attribute> + <attribute><id>EFF_DRAM_BANKS</id></attribute> + <attribute><id>EFF_DRAM_ROWS</id></attribute> + <attribute><id>EFF_DRAM_COLS</id></attribute> + <attribute><id>EFF_DRAM_DENSITY</id></attribute> + <attribute><id>EFF_DRAM_TRCD</id></attribute> + <attribute><id>EFF_DRAM_TRRD</id></attribute> + <attribute><id>EFF_DRAM_TRP</id></attribute> + <attribute><id>EFF_DRAM_TRAS</id></attribute> + <attribute><id>EFF_DRAM_TRC</id></attribute> + <attribute><id>EFF_DRAM_TRFC</id></attribute> + <attribute><id>EFF_DRAM_TWTR</id></attribute> + <attribute><id>EFF_DRAM_TRTP</id></attribute> + <attribute><id>EFF_DRAM_TFAW</id></attribute> + <attribute><id>EFF_DRAM_BL</id></attribute> + <attribute><id>EFF_DRAM_CL</id></attribute> + <attribute><id>EFF_DRAM_AL</id></attribute> + <attribute><id>EFF_DRAM_CWL</id></attribute> + <attribute><id>EFF_DRAM_RBT</id></attribute> + <attribute><id>EFF_DRAM_TM</id></attribute> + <attribute><id>EFF_DRAM_DLL_RESET</id></attribute> + <attribute><id>EFF_DRAM_WR</id></attribute> + <attribute><id>EFF_DRAM_DLL_PPD</id></attribute> + <attribute><id>EFF_DRAM_DLL_ENABLE</id></attribute> + <attribute><id>EFF_DRAM_TDQS</id></attribute> + <attribute><id>EFF_DRAM_WR_LVL_ENABLE</id></attribute> + <attribute><id>EFF_DRAM_OUTPUT_BUFFER</id></attribute> + <attribute><id>EFF_DRAM_PASR</id></attribute> + <attribute><id>EFF_DRAM_ASR</id></attribute> + <attribute><id>EFF_DRAM_SRT</id></attribute> + <attribute><id>EFF_MPR_LOC</id></attribute> + <attribute><id>EFF_MPR_MODE</id></attribute> + <attribute><id>EFF_DIMM_RCD_CNTL_WORD_0_15</id></attribute> + <attribute><id>MSS_THROTTLE_NUMERATOR</id></attribute> + <attribute><id>MSS_THROTTLE_DENOMINATOR</id></attribute> + <attribute><id>MSS_THROTTLE_CHANNEL_NUMERATOR</id></attribute> + <attribute><id>MSS_THROTTLE_CHANNEL_DENOMINATOR</id></attribute> + <attribute><id>MSS_WATT_TARGET</id></attribute> + <attribute><id>MSS_POWER_SLOPE</id></attribute> + <attribute><id>MSS_POWER_INT</id></attribute> + <attribute><id>MSS_DIMM_MAXBANDWIDTH_GBS</id></attribute> + <attribute><id>MSS_DIMM_MAXBANDWIDTH_MRS</id></attribute> + <attribute><id>MSS_CHANNEL_MAXBANDWIDTH_GBS</id></attribute> + <attribute><id>MSS_CHANNEL_MAXBANDWIDTH_MRS</id></attribute> + <attribute><id>MSS_DIMM_MAXPOWER</id></attribute> + <attribute><id>MSS_CHANNEL_MAXPOWER</id></attribute> + <attribute><id>MSS_MEMSIZE_MBA</id></attribute> </targetType> <targetType> @@ -433,6 +516,7 @@ <id>TYPE</id> <default>MCS</default> </attribute> + <attribute><id>MSS_MEMSIZE</id></attribute> </targetType> <targetType> @@ -560,6 +644,8 @@ <field><id>engine</id><value>0</value></field> </default> </attribute> + <attribute><id>MSS_VOLT</id></attribute> + <attribute><id>MSS_FREQ</id></attribute> </targetType> <!-- Centaur MBS --> diff --git a/src/usr/targeting/xmltohb/xmltohb.pl b/src/usr/targeting/xmltohb/xmltohb.pl index c4443b0bb..e071858f5 100755 --- a/src/usr/targeting/xmltohb/xmltohb.pl +++ b/src/usr/targeting/xmltohb/xmltohb.pl @@ -230,7 +230,7 @@ sub validateSubElements { # print keys %{$element} . "\n"; - for my $subElementName (keys %{$element}) + for my $subElementName (sort(keys %{$element})) { if(!exists $criteria->{$subElementName}) { @@ -239,7 +239,7 @@ sub validateSubElements { } } - for my $subElementName (keys %{$criteria}) + for my $subElementName (sort(keys %{$criteria})) { if( ($criteria->{$subElementName}{required} == 1) && (!exists $element->{$subElementName})) @@ -1184,7 +1184,7 @@ sub writeTraitFileTraits { { my $simpleType = $attribute->{simpleType}; my $simpleTypeProperties = simpleTypeProperties(); - for my $typeName (keys %{$simpleType}) + for my $typeName (sort(keys %{$simpleType})) { if(exists $simpleTypeProperties->{$typeName}) { @@ -1215,7 +1215,7 @@ sub writeTraitFileTraits { { fatal("Unsupported simpleType child element for " . "attribute $attribute->{id}. Keys are (" - . join(',',keys %{$simpleType}) . ")"); + . join(',',sort(keys %{$simpleType})) . ")"); } } elsif(exists $attribute->{nativeType}) @@ -1540,7 +1540,7 @@ sub getAttributeDefault { { if(exists $attribute->{simpleType}) { - for my $type (keys %{$simpleTypeProperties}) + for my $type (sort(keys %{$simpleTypeProperties})) { # Note: must check for 'type' before 'default', otherwise # might add value to the hash @@ -2006,7 +2006,7 @@ sub packAttribute { my $simpleType = $attribute->{simpleType}; my $simpleTypeProperties = simpleTypeProperties(); - for my $typeName (keys %{$simpleType}) + for my $typeName (sort(keys %{$simpleType})) { if(exists $simpleTypeProperties->{$typeName}) { @@ -2068,7 +2068,7 @@ sub packAttribute { if( (length $binaryData) < 1) { fatal("Error requested simple type not supported. Keys are (" - . join(',',keys %{$simpleType}) . ")"); + . join(',',sort(keys %{$simpleType})) . ")"); } } elsif(exists $attribute->{complexType}) @@ -2188,7 +2188,7 @@ sub writeTargetingImage { # Serialize per target type attribute list my $perTargetTypeAttrBinData; - for my $attributeId (keys %attrhash) + for my $attributeId (sort(keys %attrhash)) { $perTargetTypeAttrBinData .= packEnumeration( $attributeIdEnumeration, @@ -2318,7 +2318,7 @@ sub writeTargetingImage { } } - for my $attributeId (keys %attrhash) + for my $attributeId (sort(keys %attrhash)) { foreach my $attributeDef (@{$attributes->{attribute}}) { @@ -2533,15 +2533,6 @@ sub writeTargetingImage { print $outFile $heapPnorInitBinData; print $outFile pack("@".($sectionHoH{heapPnorInit}{size} - $heapPnorInitOffset)); - - # Serialize 0 initiated heap section to multiple of 4k page size (pad if - # necessary) - #@TODO: Once host boot support 0 initialization of heap pages for targeting, - # remove the contents of this section, since it will be a "virtual" section. - # Until then, zero out the section and map it into memory - print $outFile pack("@".(length $heapZeroInitBinData)); - print $outFile pack("@".($sectionHoH{heapZeroInit}{size} - - $heapZeroInitOffset)); } __END__ |