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| author | Dan Crowell <dcrowell@us.ibm.com> | 2012-05-01 15:14:05 -0500 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2012-05-24 10:35:41 -0500 |
| commit | fc433c65ca76105816ffe39bffc7f5d23345104b (patch) | |
| tree | f6530d518b4223b07dd14e5ddc6fc48b83db3258 /src/usr/targeting/test | |
| parent | 5e0ff967b230bb2de22a7ea855931586f60bcf89 (diff) | |
| download | talos-hostboot-fc433c65ca76105816ffe39bffc7f5d23345104b.tar.gz talos-hostboot-fc433c65ca76105816ffe39bffc7f5d23345104b.zip | |
Pick up Simics FSI fixes for multiple chips
Updating the Simics level to get FSI fixes to allow multiple
chips to work. This also allows us to remove some previous
workarounds.
The new Simics build pulled in a different PNOR so needed to
disable some of the tests.
The new Simics build also modified some of the L3 objects so
changes were required to some debug tools.
Had to update the VENICE config since Ched rewired it to look
like MURANO/Tuleta.
Testing:
Verified 2-proc, 4-centaur MURANO config
Verified 2-proc, 4-centaur VENICE config
Change-Id: I6aaaf8aad2f82dbfffb8ade551d545bedaa3e048
RTC: 41305
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1066
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/targeting/test')
| -rw-r--r-- | src/usr/targeting/test/testtargeting.H | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/usr/targeting/test/testtargeting.H b/src/usr/targeting/test/testtargeting.H index a3c6232ea..a112275fc 100644 --- a/src/usr/targeting/test/testtargeting.H +++ b/src/usr/targeting/test/testtargeting.H @@ -236,7 +236,7 @@ class TargetingTestSuite : public CxxTest::TestSuite ErrlUserDetailsTarget(l_pTarget1).addToLog(l_err); ErrlUserDetailsTarget(l_pTarget2).addToLog(l_err); - errlCommit(l_err, TARG_COMP_ID); + errlCommit(l_err, CXXTEST_COMP_ID); TS_TRACE(EXIT_MRK "testErrlTargetFFDC"); } |
