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author | Jacob Harvey <jlharvey@us.ibm.com> | 2016-11-02 11:24:43 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-12-05 18:34:38 -0500 |
commit | 8047a6422e3d7a205ea7496c94c986d10de1f094 (patch) | |
tree | 9d4fbf8475450fae1bd18adf637a55c43fb9cddf /src/usr/targeting/common/xmltohb | |
parent | 4bc5e41b550a5586dd98d6c10032db0450010546 (diff) | |
download | talos-hostboot-8047a6422e3d7a205ea7496c94c986d10de1f094.tar.gz talos-hostboot-8047a6422e3d7a205ea7496c94c986d10de1f094.zip |
Fixing bulk_pwr_throttles calculations
Change-Id: Icda72ae4f7d9944aea3bd9719555e470ad79fda1
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32138
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael D. Pardeik <pardeik@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Dev-Ready: Brent Wieman <bwieman@us.ibm.com>
Reviewed-by: Brent Wieman <bwieman@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32459
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/targeting/common/xmltohb')
-rw-r--r-- | src/usr/targeting/common/xmltohb/attribute_types.xml | 54 | ||||
-rwxr-xr-x | src/usr/targeting/common/xmltohb/target_types.xml | 9 |
2 files changed, 54 insertions, 9 deletions
diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index c9382e9bb..9fce73d3d 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -1805,7 +1805,7 @@ on the completion of a write command to update its internal memory.</description> <type>uint64_t</type> - <default>0x0A</default> + <default>0x0</default> </field> </complexType> <persistency>non-volatile</persistency> @@ -1881,7 +1881,7 @@ on the completion of a write command to update its internal memory.</description> <type>uint64_t</type> - <default>0x0A</default> + <default>0x0</default> </field> </complexType> <persistency>non-volatile</persistency> @@ -16828,6 +16828,38 @@ Measured in GB</description> <readable/> </attribute> +<attribute><!-- Deprecated : @todo-Remove with RTC:160417 --> + <id>PROC_PCIE_LANE_EQUALIZATION</id> + <description>PCIE Lane Equalization values for each PHB + Creator: MRW + Purpose: Holds settings which are loaded into the HW to optimize the + PCIE lane signal eye between the chips + PCIE endpoints + Data Format: 4 PHBs x 32 bytes of EQ data per PHB. Each PHB has an EQ + value for each of its 16 lanes. Each value is a uint16 formatted as + follows: + Bit 0:3 - up_rx_hint (bit 0 reserved) + Bit 4:7 - up_tx_preset + Bit 8:11 - dn_rx_hint (bit 0 reserved) + Bit 12:15 - dn_tx_preset + </description> + <simpleType> + <uint8_t><default>0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77, + 0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77, + 0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77, + 0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x0, + 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x77, + 0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77, + 0x77,0x77,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, + 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, + 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, + 0x0,0x0</default> + </uint8_t> + <array>4,32</array> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> +</attribute> + <attribute> <id>PROC_PCIE_IS_SLOT</id> <description>Indicates whether PCIE lanes terminate at a pluggable slot @@ -32273,4 +32305,22 @@ Measured in GB</description> <writeable/> </attribute> +<attribute> + <id>MSS_MEM_PORT_POS_OF_FAIL_THROTTLE</id> + <description> + This is the fapi position of the port that failed to calculate + memory throttles given the passed in watt target and or utilization + </description> + <simpleType> + <uint64_t></uint64_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MSS_MEM_PORT_POS_OF_FAIL_THROTTLE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + </attributes> diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index c45d89791..9f6f6a233 100755 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -269,6 +269,7 @@ <field><id>reserved</id><value>0</value></field> </default> </attribute> + <attribute><id>PROC_PCIE_LANE_EQUALIZATION</id></attribute> <attribute><id>CDM_DOMAIN</id><default>FABRIC</default></attribute> <attribute><id>HOT_PLUG_POWER_CONTROLLER_INFO</id></attribute> <attribute><id>PROC_R_LOADLINE_VDD_UOHM</id></attribute> @@ -885,6 +886,7 @@ <attribute><id>MSS_VREF_DAC_NIBBLE</id></attribute> <attribute><id>MSS_VCCD_OVERRIDE</id></attribute> <attribute><id>RAW_MTM</id></attribute> + <attribute><id>MSS_MEM_PORT_POS_OF_FAIL_THROTTLE</id></attribute> </targetType> <!-- enc-node-power9 --> @@ -1989,10 +1991,6 @@ <attribute><id>PROC_PCIE_IOP_CONFIG</id></attribute> <attribute><id>CDM_DOMAIN</id><default>IO</default></attribute> - <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute> - <attribute><id>HWAS_STATE_CHANGED_SUBSCRIPTION_MASK</id> - <default>0x00000001</default> <!-- GARD --> - </attribute> </targetType><!-- unit-pec-power9 --> <!-- PHB @@ -2241,9 +2239,6 @@ <default>CAPP</default> </attribute> <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute> - <attribute><id>HWAS_STATE_CHANGED_SUBSCRIPTION_MASK</id> - <default>0x00000001</default> <!-- GARD --> - </attribute> <attribute> <id>PRIMARY_CAPABILITIES</id> <default> |