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author | Christian Geddes <crgeddes@us.ibm.com> | 2019-03-12 15:23:17 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2019-03-17 13:36:53 -0500 |
commit | b397d8d630ac63ed736978831aa2352b93df0ad9 (patch) | |
tree | 3b0c0817ea28f80e76f1624c7269dc6b5d215f01 /src/usr/targeting/common/xmltohb/simics_AXONE.system.xml | |
parent | 5588cf81b95d9a940040d16e995e07738c8af0d4 (diff) | |
download | talos-hostboot-b397d8d630ac63ed736978831aa2352b93df0ad9.tar.gz talos-hostboot-b397d8d630ac63ed736978831aa2352b93df0ad9.zip |
Allow single dimm configurations in Axone
This attribute was likely copied from Cumulus where single dimm
configurations we invalid. In Axone single dimm configurations should
be valid. I hit this during bringup when I had the simics scripts configured
in a way that was only making a single dimm detectable
Change-Id: I13908a18ba22a63fae74c68f2d43221dce0a07f1
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/73194
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Chen Du <duchen@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/targeting/common/xmltohb/simics_AXONE.system.xml')
-rw-r--r-- | src/usr/targeting/common/xmltohb/simics_AXONE.system.xml | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/usr/targeting/common/xmltohb/simics_AXONE.system.xml b/src/usr/targeting/common/xmltohb/simics_AXONE.system.xml index 35177ce76..5a02cc97f 100644 --- a/src/usr/targeting/common/xmltohb/simics_AXONE.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_AXONE.system.xml @@ -259,7 +259,7 @@ </attribute> <attribute> <id>MSS_INTERLEAVE_ENABLE</id> - <default>0x06</default> + <default>0x07</default> </attribute> <attribute> <id>MSS_MBA_ADDR_INTERLEAVE_BIT</id> |