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| author | Christian Geddes <crgeddes@us.ibm.com> | 2019-03-29 09:51:09 -0500 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2019-04-03 15:14:51 -0500 |
| commit | 9fd0af32313c2b5443aecab7a325fb549a185f14 (patch) | |
| tree | 6324b0798f5546ca9393a3240049dd2a7e5f0b59 /src/usr/targeting/common/xmltohb/simics_AXONE.system.xml | |
| parent | ec86a5683941d4fdf7b5ec1740d7ede0dda730d2 (diff) | |
| download | talos-hostboot-9fd0af32313c2b5443aecab7a325fb549a185f14.tar.gz talos-hostboot-9fd0af32313c2b5443aecab7a325fb549a185f14.zip | |
Set ATTR_MSS_INTERLEAVE_ENABLE to be 0xAF to allow all grouping sizes
The eff_grouping code for axone is struggling to putting the 8 ddimms
we have behind MC01 in the current axone simics model into groups <8.
This change will allow all possible group sizes and allows the code
to group these into 1 big group of 8.
Change-Id: Ic9d48524f53883014ff57451b1265202d955ece4
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75227
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Tested-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/usr/targeting/common/xmltohb/simics_AXONE.system.xml')
| -rw-r--r-- | src/usr/targeting/common/xmltohb/simics_AXONE.system.xml | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/usr/targeting/common/xmltohb/simics_AXONE.system.xml b/src/usr/targeting/common/xmltohb/simics_AXONE.system.xml index 6b30fc916..45ecfd607 100644 --- a/src/usr/targeting/common/xmltohb/simics_AXONE.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_AXONE.system.xml @@ -263,7 +263,7 @@ </attribute> <attribute> <id>MSS_INTERLEAVE_ENABLE</id> - <default>0x07</default> + <default>0xAF</default> </attribute> <attribute> <id>MSS_MBA_ADDR_INTERLEAVE_BIT</id> |
