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| author | Thi Tran <thi@us.ibm.com> | 2016-07-18 11:05:36 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-07-29 14:51:19 -0400 |
| commit | dec28fb2f89a231ae8a7e954e3d387fb878a8b27 (patch) | |
| tree | 0935741f100d97a0aa94609d47e150914ada40a1 /src/usr/scom | |
| parent | 2b2d8cbcbdb59ba38d5afee4619f5d009c2a937f (diff) | |
| download | talos-hostboot-dec28fb2f89a231ae8a7e954e3d387fb878a8b27.tar.gz talos-hostboot-dec28fb2f89a231ae8a7e954e3d387fb878a8b27.zip | |
Adding SCOM addr translation for PPE chip units
Change-Id: I708ba2769358c606e1ea7aa36436c7ee7d2c945b
RTC: 137093
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27147
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Dev-Ready: Brent Wieman <bwieman@us.ibm.com>
Reviewed-by: Brent Wieman <bwieman@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27151
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/scom')
| -rw-r--r-- | src/usr/scom/scomtrans.C | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/src/usr/scom/scomtrans.C b/src/usr/scom/scomtrans.C index 4b5987fb3..48ceb5724 100644 --- a/src/usr/scom/scomtrans.C +++ b/src/usr/scom/scomtrans.C @@ -628,11 +628,6 @@ bool getChipUnit (TARGETING::TYPE i_type, o_chipUnit = PU_PHB_CHIPUNIT; break; } - case(TARGETING::TYPE_OCC) : - { - o_chipUnit = PU_OCC_CHIPUNIT; - break; - } case(TARGETING::TYPE_CAPP) : { o_chipUnit = PU_CAPP_CHIPUNIT; @@ -687,4 +682,4 @@ bool getChipUnit (TARGETING::TYPE i_type, // SCOM_TRANS_IND_MBA_BASEADDR = 0x800000000301143f, // check to see that the Address is in the correct direct -// scom MBA address range.
\ No newline at end of file +// scom MBA address range. |
