diff options
author | Thi Tran <thi@us.ibm.com> | 2012-03-01 08:36:31 -0600 |
---|---|---|
committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2012-03-08 13:47:27 -0600 |
commit | a3b4a0ff044b60b2af8082fd5256b1926e8b35b5 (patch) | |
tree | f91c2829cb6e9071ae948d9f845bd3d752fd4bf4 /src/usr/pore | |
parent | 7838a7409307f1106aaa6df42f1909e6824de197 (diff) | |
download | talos-hostboot-a3b4a0ff044b60b2af8082fd5256b1926e8b35b5.tar.gz talos-hostboot-a3b4a0ff044b60b2af8082fd5256b1926e8b35b5.zip |
VSBE code change to run SBE cen_sbe_tp_chiplet_init1
Updated with Review comments
Change-Id: I745f0cd19b5e3159bba590f4efa9eab6fec71779
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/710
Tested-by: Jenkins Server
Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/pore')
-rw-r--r-- | src/usr/pore/makefile | 2 | ||||
-rwxr-xr-x | src/usr/pore/poreve/hook/sbe_pnor.hooks.cc | 920 | ||||
-rw-r--r-- | src/usr/pore/poreve/porevesrc/pib2cfam.C | 49 | ||||
-rw-r--r-- | src/usr/pore/poreve/porevesrc/poreve.C | 215 | ||||
-rw-r--r-- | src/usr/pore/poreve/porevesrc/poreve.H | 15 | ||||
-rw-r--r-- | src/usr/pore/poreve/porevesrc/sbevital.C | 16 | ||||
-rw-r--r-- | src/usr/pore/test/poretest.H | 165 |
7 files changed, 366 insertions, 1016 deletions
diff --git a/src/usr/pore/makefile b/src/usr/pore/makefile index 6097b74cb..63916ff46 100644 --- a/src/usr/pore/makefile +++ b/src/usr/pore/makefile @@ -24,6 +24,6 @@ ROOTPATH = ../../.. SUBDIRS = fapiporeve.d poreve.d test.d -BINARY_FILES = $(IMGDIR)/sbe_pnor.bin:76398b3859c8395b0e73c2df9a76ee28bad185fc +BINARY_FILES = $(IMGDIR)/sbe_pnor.bin:8f6722020041c1b724f0238a34c1c445a2aa7cce include ${ROOTPATH}/config.mk diff --git a/src/usr/pore/poreve/hook/sbe_pnor.hooks.cc b/src/usr/pore/poreve/hook/sbe_pnor.hooks.cc index 082f7d672..ad100cbb6 100755 --- a/src/usr/pore/poreve/hook/sbe_pnor.hooks.cc +++ b/src/usr/pore/poreve/hook/sbe_pnor.hooks.cc @@ -24,764 +24,184 @@ // // File generated by hook_indexer // Arguments : -g -b bin/sbe_pnor.out -c bin/sbe_pnor.hooks.cc -m pnor -// Generation Date : Thu Jan 12 17:14:04 EST 2012 +// Generation Date : Thu Feb 9 13:47:52 EST 2012 #include "hookmanager.H" using namespace vsbe; -static const char* symbols[374] = { -"oci::sbe_pnor_error_2_control", -"oci::slw_error_2_ptr", -"oci::proc_sbe_instruct_start_winkle_return", -"pnor::slw_deep_winkle_exit_ptr", -"oci::sbe_pnor_undefined_ptr", -"pnor::return_from_proc_sbe_select_ex", -"pnor::proc_sbe_ex_host_runtime_scom_control", -"pnor::return_from_slw_deep_winkle_enter", -"pnor::proc_sbe_ex_chiplet_reset_control", -"oci::proc_sbe_ex_host_runtime_scom", -"pnor::slw_undefined", -"pnor::_sbe_pnor_halt", -"oci::proc_sbe_pnor_setup_control", -"pnor::sbe_pnor_error_3_ptr", -"pnor::return_from_slw_deep_sleep_enter", -"oci::proc_sbe_ex_func_l3_ring_loc", -"pnor::return_from_proc_sbe_ex_core_initf", -"pnor::proc_sbe_ex_startclocks_control", -"oci::return_from_slw_deep_winkle_enter", -"oci::proc_sbe_ex_chiplet_reset_control", -"pnor::proc_sbe_ex_enable_edram_control", -"pnor::proc_sbe_ex_sp_runtime_scom_control", -"oci::proc_slw_prolog", -"pnor::sbe_pnor_error_1_control", -"oci::proc_sbe_ex_startclocks", -"oci::return_from_slw_fast_sleep_exit", -"oci::proc_sbe_ex_sp_runtime_scom", -"oci::slw_power_on_off", -"pnor::slw_fast_sleep_exit", -"pnor::slw_error_1_ptr", -"pnor::proc_sbe_ex_repair_initf", -"pnor::slw_fast_sleep_enter_ptr", -"pnor::sbe_pnor_undefined_ptr", -"oci::proc_sbe_ex_core_initf", -"pnor::exit_ex_scan0_module", -"pnor::sbe_pnor_undefined", -"pnor::host_runtime_scom", -"pnor::proc_sbe_ex_initf", -"pnor::slw_pfet_seq", -"pnor::slw_fast_sleep_exit_control", -"pnor::proc_sbe_ex_repair_initf_control", -"pnor::slw_fast_winkle_enter_ptr", -"pnor::proc_sbe_ring_table_pnor_loc", -"pnor::slw_error_1_control", -"oci::proc_sbe_dd10_ex_func_core_ring", -"pnor::return_from_proc_sbe_instruct_start", -"oci::proc_sbe_ex_core_gptr_time_initf", -"oci::proc_sbe_instruct_start_sleep_return", -"pnor::slw_fast_winkle_enter", -"pnor::proc_sbe_ex_pll_initf_control", -"oci::slw_error_0", -"pnor::slw_branch_table", -"oci::slw_error_1", -"oci::slw_error_2", -"oci::slw_error_3", -"pnor::slw_deep_sleep_enter_ptr", -"pnor::sbe_pnor_error_0_ptr", -"pnor::return_from_proc_sbe_pnor_setup", -"oci::slw_error_4", -"oci::host_runtime_scom", -"oci::proc_sbe_ex_initf", -"oci::proc_sbe_ex_core_gptr_time_initf_control", -"pnor::proc_slw_epilog", -"oci::slw_fast_winkle_enter_ptr", -"pnor::proc_sbe_ex_core_initf", -"pnor::return_from_proc_sbe_ex_pll_initf", -"oci::slw_error_2_control", -"pnor::return_from_proc_sbe_ex_initf", -"pnor::proc_sbe_instruct_start", -"oci::proc_sbe_ex_core_repair_initf", -"oci::proc_sbe_ex_gptr_time_initf", -"pnor::proc_sbe_start_host_deadman_timer", -"oci::return_from_proc_sbe_pb_startclocks", -"pnor::proc_sbe_dd10_ex_func_l3_ring", -"pnor::proc_sbe_ex_occ_runtime_scom", -"oci::proc_sbe_ex_do_manual_inits", -"oci::sp_runtime_scom", -"oci::sbe_pnor_error_3_ptr", -"oci::proc_sbe_run_exinit_sleep_return", -"oci::return_from_proc_sbe_ex_pll_initf", -"oci::proc_sbe_ex_core_repair_initf_control", -"oci::proc_sbe_ex_gptr_time_initf_control", -"pnor::proc_sbe_start_host_deadman_timer_control", -"pnor::proc_sbe_ex_chiplet_reset", -"pnor::proc_sbe_pnor_setup_control", -"oci::proc_sbe_start_host_deadman_timer", -"oci::slw_fast_sleep_exit_ptr", -"oci::slw_deep_winkle_enter", -"pnor::return_from_proc_sbe_ex_arrayinit", -"pnor::ex_scan0_module", -"oci::sbe_pnor_error_3_control", -"oci::proc_sbe_ex_arrayinit_control", -"oci::proc_sbe_pnor_setup", -"pnor::return_from_proc_sbe_start_host_deadman_timer", -"oci::slw_error_4_ptr", -"oci::exit_ex_scan0_module", +static const char* symbols[84] = { +"oci::cen_sbe_istep_pnor", +"oci::return_from_cen_sbe_arrayinit", +"oci::cen_sbe_tp_arrayinit", +"pnor::return_from_cen_sbe_scominits", +"oci::return_from_cen_sbe_tp_arrayinit", +"oci::cen_sbe_tp_chiplet_init1", +"oci::cen_sbe_tp_chiplet_init2", +"oci::cen_sbe_scominits_control", +"oci::return_from_cen_sbe_tp_chiplet_init1", +"oci::cen_sbe_tp_chiplet_init3", "pnor::_sbe_pnor_start", -"oci::proc_sbe_start_host_deadman_timer_control", -"oci::proc_sbe_pb_startclocks_control", -"oci::proc_sbe_ex_chiplet_reset", -"pnor::proc_sbe_ex_enable_edram", -"pnor::proc_sbe_ex_sp_runtime_scom", -"oci::slw_pfet_seq", -"pnor::slw_control_vector", -"oci::return_from_proc_sbe_ex_arrayinit", -"oci::proc_sbe_ring_table_pnor_loc", -"pnor::return_from_proc_sbe_ex_host_runtime_scom", -"oci::proc_sbe_ring_table_pnor", -"oci::sbe_pnor_error_0_ptr", -"pnor::sbe_pnor_error_2_control", -"pnor::return_from_proc_sbe_run_exinit", -"pnor::slw_error_3_ptr", -"pnor::slw_error_0", -"pnor::return_from_slw_deep_sleep_exit", -"pnor::host_image_offset", -"pnor::slw_error_1", -"pnor::return_from_proc_sbe_ex_dpll_initf", -"pnor::slw_error_2", -"oci::return_from_proc_sbe_ex_host_runtime_scom", -"pnor::slw_error_3", -"oci::proc_sbe_ex_startclocks_control", -"oci::return_from_proc_sbe_ex_chiplet_reset", -"pnor::slw_error_4", -"oci::slw_undefined_control", -"oci::proc_sbe_fabricinit_control", -"oci::slw_load_sprg0", -"oci::proc_sbe_ex_occ_runtime_scom", -"pnor::slw_error_2_control", -"oci::slw_error_1_ptr", -"pnor::proc_sbe_select_ex", -"pnor::sbe_pnor_undefined_control", -"oci::proc_sbe_ex_dpll_initf", -"oci::host_image_offset", -"oci::return_from_proc_sbe_ex_init_escape", -"pnor::return_from_proc_sbe_lco_loader", -"oci::return_from_slw_fast_winkle_exit", -"pnor::sbe_pnor_branch_table", -"pnor::proc_sbe_ex_gptr_time_initf", -"pnor::return_from_proc_sbe_pb_startclocks", -"oci::proc_sbe_ex_pll_initf", -"pnor::proc_sbe_ex_do_manual_inits", -"pnor::return_from_proc_sbe_ex_chiplet_init", -"pnor::sbe_pnor_error_2_ptr", -"pnor::slw_power_on_off", -"pnor::proc_sbe_select_ex_control", -"pnor::slw_fast_winkle_enter_control", -"pnor::proc_sbe_ex_gptr_time_initf_control", -"oci::slw_error_3_control", -"oci::proc_sbe_run_exinit", -"pnor::slw_load_sprg0", -"oci::slw_deep_sleep_exit", -"oci::return_from_proc_sbe_pnor_setup", -"pnor::proc_sbe_pb_startclocks", -"pnor::slw_error_0_ptr", -"pnor::return_from_slw_fast_winkle_enter", -"oci::return_from_slw_deep_winkle_exit", -"pnor::proc_sbe_pnor_setup", -"oci::sbe_pnor_error_0", -"pnor::proc_sbe_ex_core_gptr_time_initf", -"oci::proc_slw_epilog", -"pnor::slw_fast_winkle_exit", -"oci::sbe_pnor_error_1", -"pnor::proc_sbe_ex_dpll_initf", -"pnor::proc_sbe_instruct_start_control", -"pnor::proc_sbe_instruct_start_winkle_return", -"oci::sbe_pnor_error_2", -"pnor::return_from_proc_sbe_ex_core_gptr_time_initf", -"pnor::return_from_proc_sbe_ex_core_repair_initf", -"oci::sbe_pnor_error_3", -"oci::proc_sbe_ex_arrayinit", -"oci::slw_deep_sleep_exit_control", -"oci::sbe_pnor_error_4", -"oci::return_from_proc_sbe_ex_core_initf", -"pnor::proc_sbe_ex_occ_runtime_scom_control", -"oci::proc_sbe_instruct_start", -"pnor::return_from_proc_sbe_ex_sp_runtime_scom", -"pnor::return_from_proc_sbe_fabricinit", -"pnor::proc_sbe_ex_host_runtime_scom", -"oci::sbe_pnor_error_0_control", -"pnor::proc_sbe_ex_core_gptr_time_initf_control", -"oci::proc_sbe_lco_loader", -"oci::occ_runtime_scom", -"oci::return_from_slw_fast_winkle_enter", -"oci::sbe_pnor_error_4_control", -"pnor::slw_deep_sleep_exit_ptr", -"oci::return_from_proc_sbe_ex_core_repair_initf", -"oci::return_from_proc_sbe_ex_startclocks", -"oci::proc_sbe_lco_loader_control", -"pnor::slw_deep_winkle_exit", -"oci::slw_deep_winkle_enter_control", -"oci::sbe_pnor_undefined", -"pnor::return_from_slw_error_0", -"pnor::proc_sbe_run_exinit_sleep_return", -"pnor::return_from_slw_error_1", -"pnor::return_from_slw_error_2", -"oci::ex_scan0_module", -"pnor::return_from_slw_error_3", -"pnor::return_from_slw_error_4", -"oci::proc_sbe_ex_host_runtime_scom_control", -"pnor::proc_sbe_fabricinit_control", -"oci::proc_sbe_ex_chiplet_init", +"pnor::cen_sbe_do_manual_inits_control", +"pnor::cen_sbe_dts_init", +"oci::return_from_cen_sbe_tp_chiplet_init2", +"oci::return_from_cen_sbe_tp_chiplet_init3", +"pnor::return_from_cen_sbe_dts_init", +"pnor::cen_scan0_module", +"oci::cen_sbe_do_manual_inits", +"oci::cen_sbe_tp_arrayinit_control", +"oci::cen_sbe_tp_chiplet_init1_control", +"oci::cen_sbe_tp_chiplet_init2_control", +"oci::cen_sbe_tp_chiplet_init3_control", +"pnor::cen_sbe_dts_init_control", +"pnor::return_from_cen_sbe_startclocks", +"oci::return_from_cen_sbe_scominits", +"pnor::cen_sbe_pll_initf", "oci::_sbe_pnor_start", -"oci::return_from_proc_sbe_ex_chiplet_init", -"oci::slw_undefined", -"pnor::sbe_pnor_error_3_control", -"oci::sbe_pnor_error_2_ptr", -"oci::proc_sbe_fabricinit", -"pnor::return_from_proc_sbe_ex_gptr_time_initf", -"pnor::return_from_proc_sbe_ex_init_escape", -"pnor::return_from_proc_sbe_ex_repair_initf", -"oci::proc_sbe_ex_chiplet_init_control", -"pnor::return_from_proc_sbe_ex_do_manual_inits", -"oci::slw_fast_winkle_exit_ptr", -"oci::proc_sbe_ex_core_initf_control", -"oci::return_from_proc_sbe_run_exinit", -"oci::return_from_proc_sbe_ex_occ_runtime_scom", -"oci::slw_fast_winkle_exit", -"pnor::slw_error_3_control", -"pnor::proc_sbe_ring_table_pnor", -"pnor::proc_sbe_run_exinit", -"oci::slw_error_3_ptr", -"oci::return_from_slw_deep_sleep_exit", -"pnor::proc_sbe_ex_initf_control", -"oci::return_from_proc_sbe_ex_core_gptr_time_initf", -"pnor::slw_deep_sleep_exit", -"pnor::proc_sbe_ex_core_repair_initf", -"pnor::proc_sbe_ex_init_escape", -"oci::proc_sbe_ex_occ_runtime_scom_control", -"oci::return_from_slw_fast_sleep_enter", -"oci::return_from_sbe_pnor_undefined", -"pnor::sbe_pnor_error_4_ptr", -"oci::proc_sbe_ex_dpll_initf_control", -"pnor::proc_sbe_run_exinit_winkle_return", -"oci::slw_error_0_control", -"pnor::slw_deep_sleep_exit_control", -"pnor::proc_sbe_ex_core_repair_initf_control", -"oci::proc_sbe_ex_func_core_ring_loc", -"pnor::proc_sbe_ex_init_escape_control", -"oci::slw_fast_winkle_enter", -"oci::proc_sbe_ex_pll_initf_control", -"oci::slw_error_4_control", -"oci::slw_deep_winkle_exit_ptr", -"pnor::slw_deep_winkle_enter_ptr", -"oci::proc_sbe_ex_initf_control", -"oci::return_from_proc_sbe_lco_loader", -"pnor::proc_sbe_lco_loader", -"oci::slw_deep_winkle_exit", -"pnor::slw_deep_winkle_enter", -"pnor::proc_sbe_ex_core_initf_control", -"pnor::proc_sbe_ex_arrayinit_control", -"oci::slw_control_vector", -"pnor::slw_error_2_ptr", -"oci::proc_sbe_run_exinit_control", -"oci::proc_sbe_run_exinit_winkle_return", -"oci::return_from_slw_deep_sleep_enter", -"pnor::return_from_slw_fast_winkle_exit", -"pnor::return_from_proc_sbe_ex_startclocks", -"pnor::slw_fast_sleep_enter", -"pnor::proc_sbe_lco_loader_control", -"oci::return_from_proc_sbe_ex_initf", -"oci::slw_deep_winkle_enter_ptr", -"oci::proc_sbe_ex_do_manual_inits_control", -"pnor::return_from_sbe_pnor_undefined", -"oci::proc_sbe_ex_enable_edram_control", -"pnor::slw_fast_winkle_exit_control", -"oci::sbe_pnor_error_1_control", -"oci::proc_sbe_dd10_ex_func_l3_ring", -"oci::find_ddX_ring_image", -"pnor::proc_sbe_ex_dpll_initf_control", -"oci::proc_sbe_pb_startclocks", -"oci::slw_error_0_ptr", -"pnor::slw_fast_sleep_enter_control", -"pnor::proc_sbe_ex_func_core_ring_loc", -"oci::proc_sbe_ex_repair_initf", -"oci::slw_fast_sleep_enter_ptr", -"pnor::sbe_pnor_branch_table_loc", -"oci::proc_sbe_instruct_start_control", -"oci::return_from_proc_sbe_ex_repair_initf", -"pnor::proc_slw_prolog", -"oci::return_from_proc_sbe_ex_dpll_initf", -"pnor::slw_undefined_ptr", -"pnor::proc_sbe_ex_startclocks", -"oci::return_from_proc_sbe_ex_sp_runtime_scom", -"oci::return_from_proc_sbe_fabricinit", -"pnor::sbe_pnor_error_1_ptr", -"pnor::return_from_slw_fast_sleep_exit", -"pnor::return_from_slw_deep_winkle_exit", -"pnor::proc_sbe_fabricinit", -"pnor::slw_deep_sleep_enter", -"pnor::sbe_pnor_error_0", -"oci::proc_sbe_ex_repair_initf_control", -"pnor::sbe_pnor_error_1", -"pnor::return_from_proc_sbe_ex_enable_edram", -"pnor::sbe_pnor_error_2", -"pnor::return_from_sbe_pnor_error_0", -"pnor::sbe_pnor_error_3", -"pnor::return_from_sbe_pnor_error_1", -"pnor::sbe_pnor_error_4", -"pnor::return_from_sbe_pnor_error_2", -"oci::proc_sbe_select_ex", -"pnor::slw_deep_winkle_exit_control", -"oci::slw_deep_sleep_exit_ptr", -"oci::sbe_pnor_undefined_control", -"oci::sbe_pnor_branch_table_loc", -"pnor::return_from_sbe_pnor_error_3", -"pnor::return_from_proc_sbe_ex_chiplet_reset", -"oci::slw_branch_table", -"pnor::return_from_sbe_pnor_error_4", -"oci::return_from_proc_sbe_start_host_deadman_timer", -"pnor::slw_undefined_control", -"oci::slw_undefined_ptr", -"pnor::slw_deep_sleep_enter_control", -"pnor::sbe_pnor_error_0_control", -"oci::slw_deep_sleep_enter_ptr", -"pnor::occ_runtime_scom", -"pnor::proc_sbe_dd10_ex_func_core_ring", -"pnor::sbe_pnor_error_4_control", -"oci::return_from_slw_error_0", -"oci::proc_sbe_select_ex_control", -"oci::sbe_pnor_error_4_ptr", -"oci::return_from_slw_error_1", -"oci::return_from_slw_error_2", -"oci::return_from_slw_error_3", -"oci::return_from_slw_error_4", -"pnor::return_from_slw_undefined", -"pnor::proc_sbe_ex_pll_initf", -"oci::proc_sbe_ex_sp_runtime_scom_control", -"pnor::slw_error_0_control", -"pnor::proc_sbe_ex_func_l3_ring_loc", -"oci::slw_fast_sleep_exit", -"pnor::slw_error_4_control", -"oci::return_from_proc_sbe_ex_gptr_time_initf", -"oci::slw_fast_sleep_enter", -"pnor::proc_sbe_ex_chiplet_init", -"oci::ex_init_escape", -"oci::return_from_proc_sbe_ex_do_manual_inits", -"oci::return_from_slw_undefined", -"pnor::sp_runtime_scom", -"oci::slw_fast_sleep_exit_control", -"oci::slw_fast_winkle_exit_control", -"pnor::proc_sbe_run_exinit_control", -"oci::slw_error_1_control", -"pnor::proc_sbe_ex_arrayinit", -"oci::return_from_proc_sbe_instruct_start", -"oci::slw_fast_sleep_enter_control", -"pnor::proc_sbe_ex_chiplet_init_control", -"oci::return_from_proc_sbe_select_ex", -"pnor::proc_sbe_ex_do_manual_inits_control", -"oci::sbe_pnor_branch_table", -"oci::proc_sbe_ex_init_escape", -"pnor::slw_fast_sleep_exit_ptr", -"pnor::find_ddX_ring_image", -"pnor::slw_fast_winkle_exit_ptr", -"oci::sbe_pnor_error_1_ptr", -"oci::_sbe_pnor_halt", -"oci::proc_sbe_ex_enable_edram", -"pnor::return_from_proc_sbe_ex_occ_runtime_scom", -"oci::slw_deep_sleep_enter", -"pnor::proc_sbe_instruct_start_sleep_return", -"oci::slw_fast_winkle_enter_control", -"oci::return_from_proc_sbe_ex_enable_edram", -"oci::return_from_sbe_pnor_error_0", -"pnor::slw_error_4_ptr", -"oci::return_from_sbe_pnor_error_1", -"oci::return_from_sbe_pnor_error_2", -"pnor::ex_init_escape", -"oci::proc_sbe_ex_init_escape_control", -"oci::slw_deep_winkle_exit_control", -"pnor::slw_deep_winkle_enter_control", -"oci::return_from_sbe_pnor_error_3", -"pnor::return_from_slw_fast_sleep_enter", -"oci::return_from_sbe_pnor_error_4", -"pnor::proc_sbe_pb_startclocks_control", -"oci::slw_deep_sleep_enter_control", +"oci::cen_sbe_do_manual_inits_control", +"pnor::cen_sbe_initf", +"oci::cen_sbe_do_scom_manual_inits", +"pnor::cen_sbe_istep_pnor", +"oci::return_from_cen_sbe_do_scom_manual_inits", +"pnor::cen_sbe_tp_arrayinit", +"pnor::return_from_cen_sbe_tp_arrayinit", +"oci::cen_sbe_chiplet_init", +"pnor::cen_sbe_tp_chiplet_init1", +"pnor::cen_sbe_tp_chiplet_init2", +"pnor::cen_sbe_pll_initf_control", +"pnor::return_from_cen_sbe_tp_chiplet_init1", +"oci::return_from_cen_sbe_chiplet_init", +"pnor::cen_sbe_tp_chiplet_init3", +"pnor::cen_sbe_initf_control", +"pnor::return_from_cen_sbe_tp_chiplet_init2", +"oci::return_from_cen_sbe_startclocks", +"oci::cen_sbe_do_scom_manual_inits_control", +"pnor::return_from_cen_sbe_tp_chiplet_init3", +"oci::cen_sbe_pll_initf", +"pnor::cen_sbe_startclocks", +"oci::cen_sbe_initf", +"pnor::cen_sbe_tp_arrayinit_control", +"oci::cen_sbe_chiplet_init_control", +"pnor::cen_sbe_tp_chiplet_init1_control", +"pnor::cen_sbe_tp_chiplet_init2_control", +"pnor::cen_sbe_tp_chiplet_init3_control", +"pnor::return_from_cen_sbe_pll_initf", +"pnor::cen_sbe_arrayinit", +"pnor::return_from_cen_sbe_initf", +"oci::cen_sbe_pll_initf_control", +"pnor::cen_sbe_startclocks_control", +"oci::cen_sbe_initf_control", +"pnor::cen_sbe_do_scom_manual_inits", +"pnor::return_from_cen_sbe_do_scom_manual_inits", +"oci::cen_sbe_startclocks", +"pnor::cen_sbe_arrayinit_control", +"pnor::cen_sbe_chiplet_init", +"pnor::return_from_cen_sbe_chiplet_init", +"oci::return_from_cen_sbe_pll_initf", +"oci::cen_sbe_arrayinit", +"pnor::cen_sbe_do_scom_manual_inits_control", +"oci::return_from_cen_sbe_initf", +"pnor::return_from_cen_sbe_do_manual_inits", +"pnor::cen_sbe_scominits", +"oci::cen_sbe_startclocks_control", +"oci::cen_sbe_dts_init", +"oci::return_from_cen_sbe_dts_init", +"pnor::cen_sbe_chiplet_init_control", +"pnor::return_from_cen_sbe_arrayinit", +"oci::cen_scan0_module", +"oci::cen_sbe_arrayinit_control", +"pnor::cen_sbe_scominits_control", +"oci::cen_sbe_dts_init_control", +"oci::return_from_cen_sbe_do_manual_inits", +"oci::cen_sbe_scominits", +"pnor::cen_sbe_do_manual_inits", }; -static GlobalSymbolInfo info[374] = { -{PoreAddress(0x8000, 0x80000290), 'R'}, -{PoreAddress(0x8000, 0x80001ea8), 'T'}, -{PoreAddress(0x8000, 0x800019ac), 'T'}, -{PoreAddress(0x800b, 0x800016c4), 'T'}, -{PoreAddress(0x8000, 0x800078a8), 'T'}, -{PoreAddress(0x800b, 0x80004b3c), 'T'}, -{PoreAddress(0x800b, 0x80000218), 'R'}, -{PoreAddress(0x800b, 0x80001594), 'T'}, -{PoreAddress(0x800b, 0x80000170), 'R'}, -{PoreAddress(0x8000, 0x80000834), 'T'}, -{PoreAddress(0x800b, 0x80002550), 'T'}, -{PoreAddress(0x800b, 0x800051d4), 'T'}, -{PoreAddress(0x8000, 0x800002b0), 'R'}, -{PoreAddress(0x800b, 0x800075d0), 'T'}, -{PoreAddress(0x800b, 0x800011e4), 'T'}, -{PoreAddress(0x8000, 0x80000120), 'R'}, -{PoreAddress(0x800b, 0x8000665c), 'T'}, -{PoreAddress(0x800b, 0x800001d8), 'R'}, -{PoreAddress(0x8000, 0x80001594), 'T'}, -{PoreAddress(0x8000, 0x80000170), 'R'}, -{PoreAddress(0x800b, 0x800001b8), 'R'}, -{PoreAddress(0x800b, 0x800001f8), 'R'}, -{PoreAddress(0x8000, 0x8000095c), 'T'}, -{PoreAddress(0x800b, 0x80000288), 'R'}, -{PoreAddress(0x8000, 0x800006d4), 'T'}, -{PoreAddress(0x8000, 0x80000c5c), 'T'}, -{PoreAddress(0x8000, 0x800007dc), 'T'}, -{PoreAddress(0x8000, 0x80002558), 'T'}, -{PoreAddress(0x800b, 0x800018cc), 'T'}, -{PoreAddress(0x800b, 0x80001d08), 'T'}, -{PoreAddress(0x800b, 0x800004a0), 'T'}, -{PoreAddress(0x800b, 0x800009dc), 'T'}, -{PoreAddress(0x800b, 0x800078a8), 'T'}, -{PoreAddress(0x8000, 0x80000678), 'T'}, -{PoreAddress(0x800b, 0x80000488), 'T'}, -{PoreAddress(0x800b, 0x80007a28), 'T'}, -{PoreAddress(0x800b, 0x80000210), 'R'}, -{PoreAddress(0x800b, 0x80000620), 'T'}, -{PoreAddress(0x800b, 0x8000272c), 'T'}, -{PoreAddress(0x800b, 0x800002d0), 'R'}, -{PoreAddress(0x800b, 0x80000190), 'R'}, -{PoreAddress(0x800b, 0x80000d8c), 'T'}, -{PoreAddress(0x800b, 0x80000100), 'R'}, -{PoreAddress(0x800b, 0x80000308), 'R'}, -{PoreAddress(0x8000, 0x80000228), 'R'}, -{PoreAddress(0x800b, 0x80004f74), 'T'}, -{PoreAddress(0x8000, 0x800005c8), 'T'}, -{PoreAddress(0x8000, 0x80001910), 'T'}, -{PoreAddress(0x800b, 0x80001938), 'T'}, -{PoreAddress(0x800b, 0x80000180), 'R'}, -{PoreAddress(0x8000, 0x80002528), 'T'}, -{PoreAddress(0x800b, 0x80000860), 'T'}, -{PoreAddress(0x8000, 0x80002530), 'T'}, -{PoreAddress(0x8000, 0x80002538), 'T'}, -{PoreAddress(0x8000, 0x80002540), 'T'}, -{PoreAddress(0x800b, 0x8000113c), 'T'}, -{PoreAddress(0x800b, 0x8000718c), 'T'}, -{PoreAddress(0x800b, 0x80004704), 'T'}, -{PoreAddress(0x8000, 0x80002548), 'T'}, -{PoreAddress(0x8000, 0x80000210), 'R'}, -{PoreAddress(0x8000, 0x80000620), 'T'}, -{PoreAddress(0x8000, 0x800001b0), 'R'}, -{PoreAddress(0x800b, 0x8000099c), 'T'}, -{PoreAddress(0x8000, 0x80000d8c), 'T'}, -{PoreAddress(0x800b, 0x80000678), 'T'}, -{PoreAddress(0x800b, 0x80005c4c), 'T'}, -{PoreAddress(0x8000, 0x80000310), 'R'}, -{PoreAddress(0x800b, 0x800064f4), 'T'}, -{PoreAddress(0x800b, 0x8000702c), 'T'}, -{PoreAddress(0x8000, 0x800004a4), 'T'}, -{PoreAddress(0x8000, 0x800005c4), 'T'}, -{PoreAddress(0x800b, 0x80007028), 'T'}, -{PoreAddress(0x8000, 0x8000486c), 'T'}, -{PoreAddress(0x800b, 0x80000250), 'R'}, -{PoreAddress(0x800b, 0x80000808), 'T'}, -{PoreAddress(0x8000, 0x800006d0), 'T'}, -{PoreAddress(0x8000, 0x800001f0), 'R'}, -{PoreAddress(0x8000, 0x800075d0), 'T'}, -{PoreAddress(0x8000, 0x8000190c), 'T'}, -{PoreAddress(0x8000, 0x80005c4c), 'T'}, -{PoreAddress(0x8000, 0x80000198), 'R'}, -{PoreAddress(0x8000, 0x800001a8), 'R'}, -{PoreAddress(0x800b, 0x80000168), 'R'}, -{PoreAddress(0x800b, 0x80000380), 'T'}, -{PoreAddress(0x800b, 0x800002b0), 'R'}, -{PoreAddress(0x8000, 0x80007028), 'T'}, -{PoreAddress(0x8000, 0x80000bb4), 'T'}, -{PoreAddress(0x8000, 0x80001940), 'T'}, -{PoreAddress(0x800b, 0x80006208), 'T'}, -{PoreAddress(0x800b, 0x80000414), 'T'}, -{PoreAddress(0x8000, 0x80000298), 'R'}, -{PoreAddress(0x8000, 0x800001a0), 'R'}, -{PoreAddress(0x8000, 0x80007a2c), 'T'}, -{PoreAddress(0x800b, 0x800050dc), 'T'}, -{PoreAddress(0x8000, 0x800021e8), 'T'}, -{PoreAddress(0x8000, 0x80000488), 'T'}, -{PoreAddress(0x800b, 0x80004700), 'T'}, -{PoreAddress(0x8000, 0x80000168), 'R'}, -{PoreAddress(0x8000, 0x80000138), 'R'}, -{PoreAddress(0x8000, 0x80000380), 'T'}, -{PoreAddress(0x800b, 0x800005cc), 'T'}, -{PoreAddress(0x800b, 0x800007dc), 'T'}, -{PoreAddress(0x8000, 0x8000272c), 'T'}, -{PoreAddress(0x800b, 0x800002b8), 'R'}, -{PoreAddress(0x8000, 0x80006208), 'T'}, -{PoreAddress(0x8000, 0x80000100), 'R'}, -{PoreAddress(0x800b, 0x80006ecc), 'T'}, -{PoreAddress(0x8000, 0x80000108), 'R'}, -{PoreAddress(0x8000, 0x8000718c), 'T'}, -{PoreAddress(0x800b, 0x80000290), 'R'}, -{PoreAddress(0x800b, 0x80004ca4), 'T'}, -{PoreAddress(0x800b, 0x80002048), 'T'}, -{PoreAddress(0x800b, 0x80002528), 'T'}, -{PoreAddress(0x800b, 0x800013bc), 'T'}, -{PoreAddress(0x800b, 0x80000148), 'R'}, -{PoreAddress(0x800b, 0x80002530), 'T'}, -{PoreAddress(0x800b, 0x80005ae4), 'T'}, -{PoreAddress(0x800b, 0x80002538), 'T'}, -{PoreAddress(0x8000, 0x80006ecc), 'T'}, -{PoreAddress(0x800b, 0x80002540), 'T'}, -{PoreAddress(0x8000, 0x800001d8), 'R'}, -{PoreAddress(0x8000, 0x80005690), 'T'}, -{PoreAddress(0x800b, 0x80002548), 'T'}, -{PoreAddress(0x8000, 0x80000328), 'R'}, -{PoreAddress(0x8000, 0x80000140), 'R'}, -{PoreAddress(0x8000, 0x800019d4), 'T'}, -{PoreAddress(0x8000, 0x80000808), 'T'}, -{PoreAddress(0x800b, 0x80000310), 'R'}, -{PoreAddress(0x8000, 0x80001d08), 'T'}, -{PoreAddress(0x800b, 0x800055a4), 'T'}, -{PoreAddress(0x800b, 0x800002a8), 'R'}, -{PoreAddress(0x8000, 0x800003ec), 'T'}, -{PoreAddress(0x8000, 0x80000148), 'R'}, -{PoreAddress(0x8000, 0x80006a94), 'T'}, -{PoreAddress(0x800b, 0x80004e0c), 'T'}, -{PoreAddress(0x8000, 0x8000100c), 'T'}, -{PoreAddress(0x800b, 0x80007090), 'T'}, -{PoreAddress(0x800b, 0x800005c4), 'T'}, -{PoreAddress(0x800b, 0x8000486c), 'T'}, -{PoreAddress(0x8000, 0x800003f0), 'T'}, -{PoreAddress(0x800b, 0x800006d0), 'T'}, -{PoreAddress(0x800b, 0x80005db4), 'T'}, -{PoreAddress(0x800b, 0x80007464), 'T'}, -{PoreAddress(0x800b, 0x80002558), 'T'}, -{PoreAddress(0x800b, 0x80000158), 'R'}, -{PoreAddress(0x800b, 0x800002e0), 'R'}, -{PoreAddress(0x800b, 0x800001a8), 'R'}, -{PoreAddress(0x8000, 0x80000318), 'R'}, -{PoreAddress(0x8000, 0x80005620), 'T'}, -{PoreAddress(0x800b, 0x800019d4), 'T'}, -{PoreAddress(0x8000, 0x800018d4), 'T'}, -{PoreAddress(0x8000, 0x80004704), 'T'}, -{PoreAddress(0x800b, 0x800051e8), 'T'}, -{PoreAddress(0x800b, 0x80001b68), 'T'}, -{PoreAddress(0x800b, 0x80000e34), 'T'}, -{PoreAddress(0x8000, 0x8000176c), 'T'}, -{PoreAddress(0x800b, 0x80007a2c), 'T'}, -{PoreAddress(0x8000, 0x80007a14), 'T'}, -{PoreAddress(0x800b, 0x800005c8), 'T'}, -{PoreAddress(0x8000, 0x8000099c), 'T'}, -{PoreAddress(0x800b, 0x80001968), 'T'}, -{PoreAddress(0x8000, 0x80007a18), 'T'}, -{PoreAddress(0x800b, 0x800003ec), 'T'}, -{PoreAddress(0x800b, 0x80000220), 'R'}, -{PoreAddress(0x800b, 0x800019ac), 'T'}, -{PoreAddress(0x8000, 0x80007a1c), 'T'}, -{PoreAddress(0x800b, 0x8000597c), 'T'}, -{PoreAddress(0x800b, 0x800060a0), 'T'}, -{PoreAddress(0x8000, 0x80007a20), 'T'}, -{PoreAddress(0x8000, 0x800004a8), 'T'}, -{PoreAddress(0x8000, 0x800002d8), 'R'}, -{PoreAddress(0x8000, 0x80007a24), 'T'}, -{PoreAddress(0x8000, 0x8000665c), 'T'}, -{PoreAddress(0x800b, 0x80000208), 'R'}, -{PoreAddress(0x8000, 0x8000702c), 'T'}, -{PoreAddress(0x800b, 0x80006bfc), 'T'}, -{PoreAddress(0x800b, 0x800049d4), 'T'}, -{PoreAddress(0x800b, 0x80000834), 'T'}, -{PoreAddress(0x8000, 0x80000280), 'R'}, -{PoreAddress(0x800b, 0x800001b0), 'R'}, -{PoreAddress(0x8000, 0x8000534c), 'T'}, -{PoreAddress(0x8000, 0x80000200), 'R'}, -{PoreAddress(0x8000, 0x80000e34), 'T'}, -{PoreAddress(0x8000, 0x800002a0), 'R'}, -{PoreAddress(0x800b, 0x80001314), 'T'}, -{PoreAddress(0x8000, 0x800060a0), 'T'}, -{PoreAddress(0x8000, 0x8000692c), 'T'}, -{PoreAddress(0x8000, 0x80000150), 'R'}, -{PoreAddress(0x800b, 0x80001970), 'T'}, -{PoreAddress(0x8000, 0x800002e8), 'R'}, -{PoreAddress(0x8000, 0x80007a28), 'T'}, -{PoreAddress(0x800b, 0x80001bd8), 'T'}, -{PoreAddress(0x800b, 0x8000190c), 'T'}, -{PoreAddress(0x800b, 0x80001d78), 'T'}, -{PoreAddress(0x800b, 0x80001f18), 'T'}, -{PoreAddress(0x8000, 0x80000414), 'T'}, -{PoreAddress(0x800b, 0x800020b8), 'T'}, -{PoreAddress(0x800b, 0x80002258), 'T'}, -{PoreAddress(0x8000, 0x80000218), 'R'}, -{PoreAddress(0x800b, 0x80000140), 'R'}, -{PoreAddress(0x8000, 0x8000048c), 'T'}, -{PoreAddress(0x8000, 0x80004700), 'T'}, -{PoreAddress(0x8000, 0x80005db4), 'T'}, -{PoreAddress(0x8000, 0x80002550), 'T'}, -{PoreAddress(0x800b, 0x80000298), 'R'}, -{PoreAddress(0x8000, 0x80007464), 'T'}, -{PoreAddress(0x8000, 0x800052cc), 'T'}, -{PoreAddress(0x800b, 0x80005814), 'T'}, -{PoreAddress(0x800b, 0x80006a94), 'T'}, -{PoreAddress(0x800b, 0x80005f38), 'T'}, -{PoreAddress(0x8000, 0x80000188), 'R'}, -{PoreAddress(0x800b, 0x800067c4), 'T'}, -{PoreAddress(0x8000, 0x80000f64), 'T'}, -{PoreAddress(0x8000, 0x800001c8), 'R'}, -{PoreAddress(0x8000, 0x80004ca4), 'T'}, -{PoreAddress(0x8000, 0x80006d64), 'T'}, -{PoreAddress(0x8000, 0x80001968), 'T'}, -{PoreAddress(0x800b, 0x80000318), 'R'}, -{PoreAddress(0x800b, 0x80000108), 'R'}, -{PoreAddress(0x800b, 0x80005620), 'T'}, -{PoreAddress(0x8000, 0x80002048), 'T'}, -{PoreAddress(0x8000, 0x800013bc), 'T'}, -{PoreAddress(0x800b, 0x800001c0), 'R'}, -{PoreAddress(0x8000, 0x8000597c), 'T'}, -{PoreAddress(0x800b, 0x800018d4), 'T'}, -{PoreAddress(0x800b, 0x800004a4), 'T'}, -{PoreAddress(0x800b, 0x800007b0), 'T'}, -{PoreAddress(0x8000, 0x80000208), 'R'}, -{PoreAddress(0x8000, 0x80000a84), 'T'}, -{PoreAddress(0x8000, 0x80007918), 'T'}, -{PoreAddress(0x800b, 0x8000773c), 'T'}, -{PoreAddress(0x8000, 0x80000178), 'R'}, -{PoreAddress(0x800b, 0x800019a8), 'T'}, -{PoreAddress(0x8000, 0x80000300), 'R'}, -{PoreAddress(0x800b, 0x800002d8), 'R'}, -{PoreAddress(0x800b, 0x80000198), 'R'}, -{PoreAddress(0x8000, 0x80000108), 'R'}, -{PoreAddress(0x800b, 0x800001e8), 'R'}, -{PoreAddress(0x8000, 0x80001938), 'T'}, -{PoreAddress(0x8000, 0x80000180), 'R'}, -{PoreAddress(0x8000, 0x80000320), 'R'}, -{PoreAddress(0x8000, 0x800016c4), 'T'}, -{PoreAddress(0x800b, 0x800014ec), 'T'}, -{PoreAddress(0x8000, 0x800001c0), 'R'}, -{PoreAddress(0x8000, 0x80004e0c), 'T'}, -{PoreAddress(0x800b, 0x8000534c), 'T'}, -{PoreAddress(0x8000, 0x80001970), 'T'}, -{PoreAddress(0x800b, 0x80001940), 'T'}, -{PoreAddress(0x800b, 0x800001c8), 'R'}, -{PoreAddress(0x800b, 0x800001a0), 'R'}, -{PoreAddress(0x8000, 0x800002b8), 'R'}, -{PoreAddress(0x800b, 0x80001ea8), 'T'}, -{PoreAddress(0x8000, 0x80000160), 'R'}, -{PoreAddress(0x8000, 0x800019a8), 'T'}, -{PoreAddress(0x8000, 0x800011e4), 'T'}, -{PoreAddress(0x800b, 0x8000100c), 'T'}, -{PoreAddress(0x800b, 0x8000692c), 'T'}, -{PoreAddress(0x800b, 0x8000189c), 'T'}, -{PoreAddress(0x800b, 0x80000150), 'R'}, -{PoreAddress(0x8000, 0x800064f4), 'T'}, -{PoreAddress(0x8000, 0x800014ec), 'T'}, -{PoreAddress(0x8000, 0x800001d0), 'R'}, -{PoreAddress(0x800b, 0x80007918), 'T'}, -{PoreAddress(0x8000, 0x800001b8), 'R'}, -{PoreAddress(0x800b, 0x800002f0), 'R'}, -{PoreAddress(0x8000, 0x80000288), 'R'}, -{PoreAddress(0x8000, 0x80000250), 'R'}, -{PoreAddress(0x8000, 0x800005d0), 'T'}, -{PoreAddress(0x800b, 0x80000178), 'R'}, -{PoreAddress(0x8000, 0x800051e8), 'T'}, -{PoreAddress(0x8000, 0x80001b68), 'T'}, -{PoreAddress(0x800b, 0x800002c0), 'R'}, -{PoreAddress(0x800b, 0x80000108), 'R'}, -{PoreAddress(0x8000, 0x800004a0), 'T'}, -{PoreAddress(0x8000, 0x800009dc), 'T'}, -{PoreAddress(0x800b, 0x80000278), 'R'}, -{PoreAddress(0x8000, 0x80000220), 'R'}, -{PoreAddress(0x8000, 0x80005f38), 'T'}, -{PoreAddress(0x800b, 0x8000095c), 'T'}, -{PoreAddress(0x8000, 0x80005ae4), 'T'}, -{PoreAddress(0x800b, 0x80002388), 'T'}, -{PoreAddress(0x800b, 0x800006d4), 'T'}, -{PoreAddress(0x8000, 0x80006bfc), 'T'}, -{PoreAddress(0x8000, 0x800049d4), 'T'}, -{PoreAddress(0x800b, 0x800072f8), 'T'}, -{PoreAddress(0x800b, 0x80000c5c), 'T'}, -{PoreAddress(0x800b, 0x8000176c), 'T'}, -{PoreAddress(0x800b, 0x800052cc), 'T'}, -{PoreAddress(0x800b, 0x800018a4), 'T'}, -{PoreAddress(0x800b, 0x80007a14), 'T'}, -{PoreAddress(0x8000, 0x80000190), 'R'}, -{PoreAddress(0x800b, 0x80007a18), 'T'}, -{PoreAddress(0x800b, 0x80006370), 'T'}, -{PoreAddress(0x800b, 0x80007a1c), 'T'}, -{PoreAddress(0x800b, 0x800071fc), 'T'}, -{PoreAddress(0x800b, 0x80007a20), 'T'}, -{PoreAddress(0x800b, 0x80007368), 'T'}, -{PoreAddress(0x800b, 0x80007a24), 'T'}, -{PoreAddress(0x800b, 0x800074d4), 'T'}, -{PoreAddress(0x8000, 0x800055a4), 'T'}, -{PoreAddress(0x800b, 0x800002f8), 'R'}, -{PoreAddress(0x8000, 0x80001314), 'T'}, -{PoreAddress(0x8000, 0x800002a8), 'R'}, -{PoreAddress(0x8000, 0x80000278), 'R'}, -{PoreAddress(0x800b, 0x80007640), 'T'}, -{PoreAddress(0x800b, 0x80005690), 'T'}, -{PoreAddress(0x8000, 0x80000860), 'T'}, -{PoreAddress(0x800b, 0x800077ac), 'T'}, -{PoreAddress(0x8000, 0x800050dc), 'T'}, -{PoreAddress(0x800b, 0x80000328), 'R'}, -{PoreAddress(0x8000, 0x80002388), 'T'}, -{PoreAddress(0x800b, 0x800002c8), 'R'}, -{PoreAddress(0x800b, 0x80000280), 'R'}, -{PoreAddress(0x8000, 0x8000113c), 'T'}, -{PoreAddress(0x800b, 0x80000200), 'R'}, -{PoreAddress(0x800b, 0x80000228), 'R'}, -{PoreAddress(0x800b, 0x800002a0), 'R'}, -{PoreAddress(0x8000, 0x80001bd8), 'T'}, -{PoreAddress(0x8000, 0x80000158), 'R'}, -{PoreAddress(0x8000, 0x8000773c), 'T'}, -{PoreAddress(0x8000, 0x80001d78), 'T'}, -{PoreAddress(0x8000, 0x80001f18), 'T'}, -{PoreAddress(0x8000, 0x800020b8), 'T'}, -{PoreAddress(0x8000, 0x80002258), 'T'}, -{PoreAddress(0x800b, 0x800023f8), 'T'}, -{PoreAddress(0x800b, 0x800003f0), 'T'}, -{PoreAddress(0x8000, 0x800001f8), 'R'}, -{PoreAddress(0x800b, 0x80000300), 'R'}, -{PoreAddress(0x800b, 0x80000120), 'R'}, -{PoreAddress(0x8000, 0x800018cc), 'T'}, -{PoreAddress(0x800b, 0x80000320), 'R'}, -{PoreAddress(0x8000, 0x80005814), 'T'}, -{PoreAddress(0x8000, 0x8000189c), 'T'}, -{PoreAddress(0x800b, 0x8000048c), 'T'}, -{PoreAddress(0x8000, 0x800001e0), 'R'}, -{PoreAddress(0x8000, 0x800067c4), 'T'}, -{PoreAddress(0x8000, 0x800023f8), 'T'}, -{PoreAddress(0x800b, 0x800001f0), 'R'}, -{PoreAddress(0x8000, 0x800002d0), 'R'}, -{PoreAddress(0x8000, 0x800002f0), 'R'}, -{PoreAddress(0x800b, 0x80000160), 'R'}, -{PoreAddress(0x8000, 0x80000308), 'R'}, -{PoreAddress(0x800b, 0x800004a8), 'T'}, -{PoreAddress(0x8000, 0x80004f74), 'T'}, -{PoreAddress(0x8000, 0x800002c0), 'R'}, -{PoreAddress(0x800b, 0x80000188), 'R'}, -{PoreAddress(0x8000, 0x80004b3c), 'T'}, -{PoreAddress(0x800b, 0x800001d0), 'R'}, -{PoreAddress(0x8000, 0x80007090), 'T'}, -{PoreAddress(0x8000, 0x800007b0), 'T'}, -{PoreAddress(0x800b, 0x80000bb4), 'T'}, -{PoreAddress(0x800b, 0x800005d0), 'T'}, -{PoreAddress(0x800b, 0x80000f64), 'T'}, -{PoreAddress(0x8000, 0x800072f8), 'T'}, -{PoreAddress(0x8000, 0x800051d4), 'T'}, -{PoreAddress(0x8000, 0x800005cc), 'T'}, -{PoreAddress(0x800b, 0x80006d64), 'T'}, -{PoreAddress(0x8000, 0x800018a4), 'T'}, -{PoreAddress(0x800b, 0x80001910), 'T'}, -{PoreAddress(0x8000, 0x800002e0), 'R'}, -{PoreAddress(0x8000, 0x80006370), 'T'}, -{PoreAddress(0x8000, 0x800071fc), 'T'}, -{PoreAddress(0x800b, 0x800021e8), 'T'}, -{PoreAddress(0x8000, 0x80007368), 'T'}, -{PoreAddress(0x8000, 0x800074d4), 'T'}, -{PoreAddress(0x800b, 0x800001e0), 'R'}, -{PoreAddress(0x8000, 0x800001e8), 'R'}, -{PoreAddress(0x8000, 0x800002f8), 'R'}, -{PoreAddress(0x800b, 0x800002e8), 'R'}, -{PoreAddress(0x8000, 0x80007640), 'T'}, -{PoreAddress(0x800b, 0x80000a84), 'T'}, -{PoreAddress(0x8000, 0x800077ac), 'T'}, -{PoreAddress(0x800b, 0x80000138), 'R'}, -{PoreAddress(0x8000, 0x800002c8), 'R'}, +static GlobalSymbolInfo info[84] = { +{PoreAddress(0x8000, 0x00000c00), 'T'}, +{PoreAddress(0x8000, 0x00000fb0), 'T'}, +{PoreAddress(0x8000, 0x00001784), 'T'}, +{PoreAddress(0x800b, 0x000013a0), 'T'}, +{PoreAddress(0x8000, 0x00000d10), 'T'}, +{PoreAddress(0x8000, 0x00001554), 'T'}, +{PoreAddress(0x8000, 0x000016c8), 'T'}, +{PoreAddress(0x8000, 0x000001d8), 'R'}, +{PoreAddress(0x8000, 0x00000c68), 'T'}, +{PoreAddress(0x8000, 0x00001884), 'T'}, +{PoreAddress(0x800b, 0x00000c00), 'T'}, +{PoreAddress(0x800b, 0x000001c8), 'R'}, +{PoreAddress(0x800b, 0x00001cb0), 'T'}, +{PoreAddress(0x8000, 0x00000db8), 'T'}, +{PoreAddress(0x8000, 0x00000e60), 'T'}, +{PoreAddress(0x800b, 0x00001100), 'T'}, +{PoreAddress(0x800b, 0x0000148c), 'T'}, +{PoreAddress(0x8000, 0x00001cc8), 'T'}, +{PoreAddress(0x8000, 0x00000190), 'R'}, +{PoreAddress(0x8000, 0x00000180), 'R'}, +{PoreAddress(0x8000, 0x00000188), 'R'}, +{PoreAddress(0x8000, 0x00000198), 'R'}, +{PoreAddress(0x800b, 0x000001b8), 'R'}, +{PoreAddress(0x800b, 0x000012f8), 'T'}, +{PoreAddress(0x8000, 0x000013a0), 'T'}, +{PoreAddress(0x800b, 0x00001c9c), 'T'}, +{PoreAddress(0x8000, 0x00000c00), 'T'}, +{PoreAddress(0x8000, 0x000001c8), 'R'}, +{PoreAddress(0x800b, 0x00001cbc), 'T'}, +{PoreAddress(0x8000, 0x00001dd4), 'T'}, +{PoreAddress(0x800b, 0x00000c00), 'T'}, +{PoreAddress(0x8000, 0x00001448), 'T'}, +{PoreAddress(0x800b, 0x00001784), 'T'}, +{PoreAddress(0x800b, 0x00000d10), 'T'}, +{PoreAddress(0x8000, 0x00001938), 'T'}, +{PoreAddress(0x800b, 0x00001554), 'T'}, +{PoreAddress(0x800b, 0x000016c8), 'T'}, +{PoreAddress(0x800b, 0x000001b0), 'R'}, +{PoreAddress(0x800b, 0x00000c68), 'T'}, +{PoreAddress(0x8000, 0x00000f08), 'T'}, +{PoreAddress(0x800b, 0x00001884), 'T'}, +{PoreAddress(0x800b, 0x000001c0), 'R'}, +{PoreAddress(0x800b, 0x00000db8), 'T'}, +{PoreAddress(0x8000, 0x000012f8), 'T'}, +{PoreAddress(0x8000, 0x000001e0), 'R'}, +{PoreAddress(0x800b, 0x00000e60), 'T'}, +{PoreAddress(0x8000, 0x00001c9c), 'T'}, +{PoreAddress(0x800b, 0x00001cd4), 'T'}, +{PoreAddress(0x8000, 0x00001cbc), 'T'}, +{PoreAddress(0x800b, 0x00000190), 'R'}, +{PoreAddress(0x8000, 0x000001a0), 'R'}, +{PoreAddress(0x800b, 0x00000180), 'R'}, +{PoreAddress(0x800b, 0x00000188), 'R'}, +{PoreAddress(0x800b, 0x00000198), 'R'}, +{PoreAddress(0x800b, 0x00001058), 'T'}, +{PoreAddress(0x800b, 0x00001b94), 'T'}, +{PoreAddress(0x800b, 0x000011a8), 'T'}, +{PoreAddress(0x8000, 0x000001b0), 'R'}, +{PoreAddress(0x800b, 0x000001d0), 'R'}, +{PoreAddress(0x8000, 0x000001c0), 'R'}, +{PoreAddress(0x800b, 0x00001dd4), 'T'}, +{PoreAddress(0x800b, 0x00001448), 'T'}, +{PoreAddress(0x8000, 0x00001cd4), 'T'}, +{PoreAddress(0x800b, 0x000001a8), 'R'}, +{PoreAddress(0x800b, 0x00001938), 'T'}, +{PoreAddress(0x800b, 0x00000f08), 'T'}, +{PoreAddress(0x8000, 0x00001058), 'T'}, +{PoreAddress(0x8000, 0x00001b94), 'T'}, +{PoreAddress(0x800b, 0x000001e0), 'R'}, +{PoreAddress(0x8000, 0x000011a8), 'T'}, +{PoreAddress(0x800b, 0x00001250), 'T'}, +{PoreAddress(0x800b, 0x00001dc8), 'T'}, +{PoreAddress(0x8000, 0x000001d0), 'R'}, +{PoreAddress(0x8000, 0x00001cb0), 'T'}, +{PoreAddress(0x8000, 0x00001100), 'T'}, +{PoreAddress(0x800b, 0x000001a0), 'R'}, +{PoreAddress(0x800b, 0x00000fb0), 'T'}, +{PoreAddress(0x8000, 0x0000148c), 'T'}, +{PoreAddress(0x8000, 0x000001a8), 'R'}, +{PoreAddress(0x800b, 0x000001d8), 'R'}, +{PoreAddress(0x8000, 0x000001b8), 'R'}, +{PoreAddress(0x8000, 0x00001250), 'T'}, +{PoreAddress(0x8000, 0x00001dc8), 'T'}, +{PoreAddress(0x800b, 0x00001cc8), 'T'}, }; static void @@ -790,7 +210,7 @@ init() int i; FAPI_INF("HookManager : " "Indexing global symbols for bin/sbe_pnor.out"); -for (i = 0; i < 374; i++) { +for (i = 0; i < 84; i++) { HookManager::registerGlobalSymbol(symbols[i], &(info[i])); } } diff --git a/src/usr/pore/poreve/porevesrc/pib2cfam.C b/src/usr/pore/poreve/porevesrc/pib2cfam.C index cf6100767..648df8822 100644 --- a/src/usr/pore/poreve/porevesrc/pib2cfam.C +++ b/src/usr/pore/poreve/porevesrc/pib2cfam.C @@ -21,21 +21,13 @@ // // IBM_PROLOG_END // -*- mode: C++; c-file-style: "linux"; -*- -// $Id: pib2cfam.C,v 1.9 2012/01/09 21:22:50 jeshua Exp $ +// $Id: pib2cfam.C,v 1.10 2012/02/27 22:52:31 jeshua Exp $ /// \file pib2cfam.C -/// \brief A temporary hack while waiting for hardware updates - a simple -/// PibSlave that maps a small range of PIB addresses to CFAM addresses. -/// -/// \todo Verify the assumption that the high-order 32 bits of the 64-bit data -/// are the bits that are read and written to the CFAM register. +/// \brief A simple PibSlave that maps a small range of PIB addresses to CFAM +/// addresses. #include "pib2cfam.H" -//JDS TODO - remove the ECMD headers once we've got attribute support -#ifndef __HOSTBOOT_MODULE -#include "fapiSharedUtils.H" -#include "ecmdUtils.H" -#endif using namespace vsbe; @@ -56,30 +48,21 @@ Pib2Cfam::~Pib2Cfam() static uint32_t translateAddress(uint32_t address, fapi::Target* i_target) { - //JDS TODO - change this to get attribute ATTR_FSI_GP_REG_SCOM_ACCESS - bool fsi_gpreg_scom_access = false; -#ifndef __HOSTBOOT_MODULE - ecmdChipData chipdata; - ecmdChipTarget e_target; - uint32_t rc; - std::string chip_type; - - fapiTargetToEcmdTarget( *i_target, e_target); - rc = ecmdGetChipData(e_target, chipdata); - if( rc ) printf( "Problem with getchipdata\n" ); - chip_type = chipdata.chipType; - - if( chip_type == "centaur" ) { - fsi_gpreg_scom_access = false; - } else { - fsi_gpreg_scom_access = true; + uint8_t fsi_gpreg_scom_access = 0; + fapi::ReturnCode frc; + + frc = FAPI_ATTR_GET( ATTR_FSI_GP_REG_SCOM_ACCESS, i_target, fsi_gpreg_scom_access ); + if(!frc.ok()) { + FAPI_ERR( "Unable to get ATTR_FSI_GP_REG_SCOM_ACCESS for target\n" ); +//JDS TODO - create an actual fapi error +// FAPI_SET_HWP_ERROR( frc, "Unable to get ATTR_FSI_GP_REG_SCOM_ACCESS for target\n" ); } -#endif + if( fsi_gpreg_scom_access ) { - return (address - 0x00050000) + 0x2800; + return (address - 0x00050000) + 0x2800; } else { - return (address - 0x00050000) + 0x1000; + return (address - 0x00050000) + 0x1000; } } @@ -106,7 +89,7 @@ Pib2Cfam::operation(Transaction& io_transaction) case 0x0005001B: rc = fapiGetCfamRegister(*iv_target, translateAddress(io_transaction.iv_address, iv_target), - *iv_dataBuffer); + *iv_dataBuffer); if (rc.ok()) { io_transaction.iv_data = ((uint64_t)iv_dataBuffer->getWord(0)) << 32; @@ -134,7 +117,7 @@ Pib2Cfam::operation(Transaction& io_transaction) iv_dataBuffer->setWord(0, io_transaction.iv_data >> 32); rc = fapiPutCfamRegister(*iv_target, translateAddress(io_transaction.iv_address, iv_target), - *iv_dataBuffer); + *iv_dataBuffer); if (rc.ok()) { me = ME_SUCCESS; } else { diff --git a/src/usr/pore/poreve/porevesrc/poreve.C b/src/usr/pore/poreve/porevesrc/poreve.C index e0a841cdd..eb2a89ede 100644 --- a/src/usr/pore/poreve/porevesrc/poreve.C +++ b/src/usr/pore/poreve/porevesrc/poreve.C @@ -20,7 +20,7 @@ // Origin: 30 // // IBM_PROLOG_END -// $Id: poreve.C,v 1.15 2011/12/14 22:11:51 bcbrock Exp $ +// $Id: poreve.C,v 1.16 2012/02/27 22:54:15 jeshua Exp $ /// \file poreve.C /// \brief The PORE Virtual Environment @@ -276,190 +276,51 @@ PoreVe::PoreVe(const PoreIbufId i_id, #endif // PM_HACKS -#ifdef VBU_HACKS - // Configure the temporary Pib2Cfam component + // Configure the Pib2Cfam component to remap MBOX scom addresses to cfam addresses + uint8_t fsi_gpreg_scom_access; + fapi::ReturnCode frc; - iv_pib2Cfam.configure(&iv_slaveTarget, - &iv_dataBuffer, - PIB2CFAM_PIB_BASE, - PIB2CFAM_PIB_SIZE, - ACCESS_MODE_READ | ACCESS_MODE_WRITE); + //JDS TODO - uncomment this when the model actually works +// frc = FAPI_ATTR_GET( ATTR_FSI_GP_REG_SCOM_ACCESS, &iv_slaveTarget, fsi_gpreg_scom_access ); + fsi_gpreg_scom_access = 0; - iv_pib.attachPrimarySlave(&iv_pib2Cfam); - - // Configure the temporary sbeVital component - - iv_sbeVital.configure(&iv_slaveTarget, - &iv_dataBuffer, - SBEVITAL_PIB_BASE, - SBEVITAL_PIB_SIZE, - ACCESS_MODE_READ | ACCESS_MODE_WRITE); - - iv_pib.attachPrimarySlave(&iv_sbeVital); + if(!frc.ok()) { + FAPI_ERR( "Unable to get ATTR_FSI_GP_REG_SCOM_ACCESS for target\n" ); + //JDS TODO - create an actual fapi error + // FAPI_SET_HWP_ERROR( frc, "Unable to get ATTR_FSI_GP_REG_SCOM_ACCESS for target\n" ); + } + if( !fsi_gpreg_scom_access ) { + iv_pib2Cfam.configure(&iv_slaveTarget, + &iv_dataBuffer, + PIB2CFAM_PIB_BASE, + PIB2CFAM_PIB_SIZE, + ACCESS_MODE_READ | ACCESS_MODE_WRITE); -#ifndef SIMPLE_VBU_HACKS_ONLY + iv_pib.attachPrimarySlave(&iv_pib2Cfam); + } - // The VBU_HACKS above are simple - they don't require complex eCMD support so - // we can test them easily with the poreve/test/fapistub test case. + // Configure the sbeVital register emulation + uint8_t use_hw_sbe_vital_register; - // The VBU hacks below are complicated to emulate, so we don't even try in - // the test/fapistub test case. + // JDS TODO - this needs to be done with an attribute (ATTR_USE_HW_SBE_VITAL_REGISTER requested) +// frc = FAPI_ATTR_GET( ATTR_USE_HW_SBE_VITAL_REGISTER, &iv_slaveTarget, use_hw_sbe_vital_register ); +// if(!frc.ok()) { +// FAPI_ERR( "Unable to get ATTR_USE_HW_SBE_VITAL_REGISTER for target\n" ); +// //JDS TODO - create an actual fapi error +// // FAPI_SET_HWP_ERROR( frc, "Unable to get ATTR_USE_HW_SBE_VITAL_REGISTER for target\n" ); +// } + use_hw_sbe_vital_register = 0; //JDS TODO - TMP until the attribute is supported and the hardware allows access to the register - // Configure the Broadside scan component if using BROADSIDE scan - //JDS TODO - add a check for broadside scan mode - ecmdConfigValid_t validOutput; - std::string tmpStr; - uint32_t tmpNum; - uint32_t rc; - ecmdChipTarget e_target; + if( !use_hw_sbe_vital_register ) { + iv_sbeVital.configure(&iv_slaveTarget, + &iv_dataBuffer, + SBEVITAL_PIB_BASE, + SBEVITAL_PIB_SIZE, + ACCESS_MODE_READ | ACCESS_MODE_WRITE); - //JDS TODO - change this to get attribute - fapiTargetToEcmdTarget( iv_slaveTarget, e_target); - rc = ecmdGetConfiguration(e_target, "SIM_BROADSIDE_MODE", - validOutput, tmpStr, tmpNum ); - if( rc || - validOutput == ECMD_CONFIG_VALID_FIELD_NONE || - validOutput == ECMD_CONFIG_VALID_FIELD_NUMERIC ) - { - FAPI_ERR( "Unable to determine SIM_BROADSIDE_MODE\n" ); + iv_pib.attachPrimarySlave(&iv_sbeVital); } - else - { - size_t pos = tmpStr.find( "scan" ); - if( pos != (uint32_t)-1 ) - { -// iv_bsscan_ex00.configure(&iv_slaveTarget, -// &iv_dataBuffer, -// BSSCAN_PIB_BASE | EX00_PIB_BASE, -// BSSCAN_PIB_SIZE, -// ACCESS_MODE_READ | ACCESS_MODE_WRITE); - -// iv_pib.attachPrimarySlave(&iv_bsscan_ex00); - - iv_bsscan_ex01.configure(&iv_slaveTarget, - &iv_dataBuffer, - BSSCAN_PIB_BASE | EX01_PIB_BASE, - BSSCAN_PIB_SIZE, - ACCESS_MODE_READ | ACCESS_MODE_WRITE); - - iv_pib.attachPrimarySlave(&iv_bsscan_ex01); - - iv_bsscan_ex02.configure(&iv_slaveTarget, - &iv_dataBuffer, - BSSCAN_PIB_BASE | EX02_PIB_BASE, - BSSCAN_PIB_SIZE, - ACCESS_MODE_READ | ACCESS_MODE_WRITE); - - iv_pib.attachPrimarySlave(&iv_bsscan_ex02); - - iv_bsscan_ex03.configure(&iv_slaveTarget, - &iv_dataBuffer, - BSSCAN_PIB_BASE | EX03_PIB_BASE, - BSSCAN_PIB_SIZE, - ACCESS_MODE_READ | ACCESS_MODE_WRITE); - - iv_pib.attachPrimarySlave(&iv_bsscan_ex03); - - iv_bsscan_ex04.configure(&iv_slaveTarget, - &iv_dataBuffer, - BSSCAN_PIB_BASE | EX04_PIB_BASE, - BSSCAN_PIB_SIZE, - ACCESS_MODE_READ | ACCESS_MODE_WRITE); - - iv_pib.attachPrimarySlave(&iv_bsscan_ex04); - - iv_bsscan_ex05.configure(&iv_slaveTarget, - &iv_dataBuffer, - BSSCAN_PIB_BASE | EX05_PIB_BASE, - BSSCAN_PIB_SIZE, - ACCESS_MODE_READ | ACCESS_MODE_WRITE); - - iv_pib.attachPrimarySlave(&iv_bsscan_ex05); - - iv_bsscan_ex06.configure(&iv_slaveTarget, - &iv_dataBuffer, - BSSCAN_PIB_BASE | EX06_PIB_BASE, - BSSCAN_PIB_SIZE, - ACCESS_MODE_READ | ACCESS_MODE_WRITE); - - iv_pib.attachPrimarySlave(&iv_bsscan_ex06); - -// iv_bsscan_ex07.configure(&iv_slaveTarget, -// &iv_dataBuffer, -// BSSCAN_PIB_BASE | EX07_PIB_BASE, -// BSSCAN_PIB_SIZE, -// ACCESS_MODE_READ | ACCESS_MODE_WRITE); - -// iv_pib.attachPrimarySlave(&iv_bsscan_ex07); - -// iv_bsscan_ex08.configure(&iv_slaveTarget, -// &iv_dataBuffer, -// BSSCAN_PIB_BASE | EX08_PIB_BASE, -// BSSCAN_PIB_SIZE, -// ACCESS_MODE_READ | ACCESS_MODE_WRITE); - -// iv_pib.attachPrimarySlave(&iv_bsscan_ex08); - - iv_bsscan_ex09.configure(&iv_slaveTarget, - &iv_dataBuffer, - BSSCAN_PIB_BASE | EX09_PIB_BASE, - BSSCAN_PIB_SIZE, - ACCESS_MODE_READ | ACCESS_MODE_WRITE); - - iv_pib.attachPrimarySlave(&iv_bsscan_ex09); - - iv_bsscan_ex10.configure(&iv_slaveTarget, - &iv_dataBuffer, - BSSCAN_PIB_BASE | EX10_PIB_BASE, - BSSCAN_PIB_SIZE, - ACCESS_MODE_READ | ACCESS_MODE_WRITE); - - iv_pib.attachPrimarySlave(&iv_bsscan_ex10); - - iv_bsscan_ex11.configure(&iv_slaveTarget, - &iv_dataBuffer, - BSSCAN_PIB_BASE | EX11_PIB_BASE, - BSSCAN_PIB_SIZE, - ACCESS_MODE_READ | ACCESS_MODE_WRITE); - - iv_pib.attachPrimarySlave(&iv_bsscan_ex11); - - iv_bsscan_ex12.configure(&iv_slaveTarget, - &iv_dataBuffer, - BSSCAN_PIB_BASE | EX12_PIB_BASE, - BSSCAN_PIB_SIZE, - ACCESS_MODE_READ | ACCESS_MODE_WRITE); - - iv_pib.attachPrimarySlave(&iv_bsscan_ex12); - - iv_bsscan_ex13.configure(&iv_slaveTarget, - &iv_dataBuffer, - BSSCAN_PIB_BASE | EX13_PIB_BASE, - BSSCAN_PIB_SIZE, - ACCESS_MODE_READ | ACCESS_MODE_WRITE); - - iv_pib.attachPrimarySlave(&iv_bsscan_ex13); - - iv_bsscan_ex14.configure(&iv_slaveTarget, - &iv_dataBuffer, - BSSCAN_PIB_BASE | EX14_PIB_BASE, - BSSCAN_PIB_SIZE, - ACCESS_MODE_READ | ACCESS_MODE_WRITE); - - iv_pib.attachPrimarySlave(&iv_bsscan_ex14); - -// iv_bsscan_ex15.configure(&iv_slaveTarget, -// &iv_dataBuffer, -// BSSCAN_PIB_BASE | EX15_PIB_BASE, -// BSSCAN_PIB_SIZE, -// ACCESS_MODE_READ | ACCESS_MODE_WRITE); - -// iv_pib.attachPrimarySlave(&iv_bsscan_ex15); - } //end SIM_BROADSIDE_MODE has scan - } //end was able to read SIM_BROADSIDE_MODE - -#endif // SIMPLE_VBU_HACKS_ONLY -#endif // VBU_HACKS + } diff --git a/src/usr/pore/poreve/porevesrc/poreve.H b/src/usr/pore/poreve/porevesrc/poreve.H index 4c2281940..41c64e7e0 100644 --- a/src/usr/pore/poreve/porevesrc/poreve.H +++ b/src/usr/pore/poreve/porevesrc/poreve.H @@ -23,7 +23,7 @@ #ifndef __VSBE_POREVE_H #define __VSBE_POREVE_H -// $Id: poreve.H,v 1.18 2011/12/16 21:47:59 bcbrock Exp $ +// $Id: poreve.H,v 1.20 2012/02/27 22:50:53 jeshua Exp $ /// \file poreve.H /// \brief The PORE Virtual Environment @@ -76,10 +76,11 @@ #include "poremodel.H" #include "pore.H" -#ifdef VBU_HACKS #include "pib2cfam.H" -#include "bsscan.H" #include "sbevital.H" + +#ifdef VBU_HACKS +#include "bsscan.H" #endif // VBU_HACKS #ifndef POREVE_STATISTICS @@ -119,7 +120,7 @@ namespace vsbe { ////////////////////////////////////////////////////////////////////// /// The PIB base address of the OTPROM memory controller - const uint32_t OTPROM_PIB_BASE = 0x00010000; + const uint32_t OTPROM_PIB_BASE = 0x00018000; /// The number of PIB \e registers defined by the OTPROM memory controller /// @@ -500,13 +501,13 @@ public: OciSlaveWritable iv_pmc; #endif // PM_HACKS -#ifdef VBU_HACKS - /// The temporary Pib2Cfam PIB Slave + /// The Pib2Cfam PIB Slave Pib2Cfam iv_pib2Cfam; - /// The temporary sbeVital PIB Slave + /// The sbeVital PIB Slave SbeVital iv_sbeVital; +#ifdef VBU_HACKS /// The Broadside Scan components for each EX // Bsscan iv_bsscan_ex00; Bsscan iv_bsscan_ex01; diff --git a/src/usr/pore/poreve/porevesrc/sbevital.C b/src/usr/pore/poreve/porevesrc/sbevital.C index 1a80337db..d8e09a29c 100644 --- a/src/usr/pore/poreve/porevesrc/sbevital.C +++ b/src/usr/pore/poreve/porevesrc/sbevital.C @@ -21,16 +21,13 @@ // // IBM_PROLOG_END // -*- mode: C++; c-file-style: "linux"; -*- -// $Id: sbevital.C,v 1.1 2011/09/19 00:25:32 jeshua Exp $ +// $Id: sbevital.C,v 1.3 2012/02/27 22:51:37 jeshua Exp $ /// \file sbevital.C -/// \brief A temporary hack to create the SBE vital reg before HW has it +/// \brief Emulate the SBE vital register in software /// -#ifdef VBU_HACKS #include "sbevital.H" -#include "fapiSharedUtils.H" -#include "ecmdUtils.H" using namespace vsbe; @@ -52,17 +49,16 @@ SbeVital::~SbeVital() fapi::ReturnCode SbeVital::operation(Transaction& io_transaction) { - fapi::ReturnCode rc=0; + fapi::ReturnCode rc=(fapi::ReturnCodes)0; ModelError me; - FAPI_INF("In sbeVital\n"); - - //On a ring write, put the data into the ring + //On a scom write, put the data into the register if( io_transaction.iv_mode == ACCESS_MODE_WRITE) { iv_data = io_transaction.iv_data >> 32; me = ME_SUCCESS; } + //On a scom read, get the data from the register else if( io_transaction.iv_mode == ACCESS_MODE_READ ) { io_transaction.iv_data = ((uint64_t)(iv_data)) << 32; @@ -76,7 +72,7 @@ SbeVital::operation(Transaction& io_transaction) io_transaction.busError(me); return rc; } -#endif + /* Local Variables: */ /* c-basic-offset: 4 */ /* End: */ diff --git a/src/usr/pore/test/poretest.H b/src/usr/pore/test/poretest.H index bc3cd5e72..a8d6e7487 100644 --- a/src/usr/pore/test/poretest.H +++ b/src/usr/pore/test/poretest.H @@ -35,7 +35,20 @@ #include <fapiPoreVeArg.H> #include <fapiTarget.H> #include <fapi.H> -#include <vfs/vfs.H> +#include <vfs/vfs.H> +#include <targeting/predicates/predicatectm.H> +#include <targeting/iterators/rangefilter.H> +#include <targeting/predicates/predicatepostfixexpr.H> +#include <targeting/predicates/predicateisfunctional.H> + +//@todo - These two include files are to workaround +//1. Avoid running test case in VBU +//2. To call isSlavePresent(). Need to be removed when PD works. +#include <targeting/util.H> +#include <fsi/fsiif.H> + +#define CENTAUR_SBE_PNOR_MRR 0 // Memory Relocation Register for Centaur + using namespace TARGETING; using namespace vsbe; @@ -47,7 +60,7 @@ class PoreTest: public CxxTest::TestSuite public: /** * @brief PORE test #1 - * Run a sample procedure + * Run a sample procedure on Centaur */ void testPore1(void) { @@ -56,7 +69,6 @@ public: bool l_unloadSbePnorImg = false; size_t l_sbePnorSize = 0; const char * l_sbePnorAddr = NULL; - errlHndl_t l_errl = NULL; do @@ -83,70 +95,135 @@ public: char l_header[10]; memcpy (l_header, l_sbePnorAddr, 9); l_header[9] = '\0'; - FAPI_INF("Loading sbe_pnor.bin, Addr 0x%llX, Size %d, Header %s", + FAPI_INF("testPore1:Loading sbe_pnor.bin, Addr 0x%llX, Size %d, Header %s", l_sbePnorAddr, l_sbePnorSize, l_header); } } - // Setting up fapi target - TARGETING::TargetService& l_targetService = - TARGETING::targetService(); - TARGETING::Target* l_testTarget = NULL; - l_targetService.masterProcChipTargetHandle(l_testTarget); - assert(l_testTarget != NULL); + // ------------ Setup Centaur targets ------------------- + // Use PredicateIsFunctional to filter only functional chips + TARGETING::PredicateIsFunctional l_isFunctional; + // filter for functional Centaur Chips + TARGETING::PredicateCTM l_membufChipFilter(CLASS_CHIP, TYPE_MEMBUF); + // Declare a postfix expression widget + TARGETING::PredicatePostfixExpr l_functionalAndMembufChipFilter; + // is-a-membuf-chip is-functional AND + l_functionalAndMembufChipFilter.push(&l_membufChipFilter).push(&l_isFunctional).And(); + // loop through all the targets, applying the filter, and put the results in l_pMemBufs + TARGETING::TargetRangeFilter l_pMemBufs( + TARGETING::targetService().begin(), + TARGETING::targetService().end(), + &l_functionalAndMembufChipFilter ); + // ------------- Setup POREVE arguments ----------------- // Setup args std::list<uint64_t> myArgs; - // Run unlimited instruction on SBE engine + // Set FapiPoreVeOtherArg: run unlimited instructions FapiPoreVeOtherArg *l_otherArg = new FapiPoreVeOtherArg(vsbe::RUN_UNLIMITED, vsbe::PORE_SBE); - //Set entry point - //l_otherArg->iv_entryPoint = const_cast<char*>("pnor::_sbe_pnor_start"); - //l_otherArg->iv_entryPoint = const_cast<char*>("pnor::proc_sbe_fabricinit"); - l_otherArg->iv_entryPoint = const_cast<char*>("pnor::proc_sbe_pb_startclocks"); - - l_otherArg->iv_mrr = 0x280000000; - + // Entry point + l_otherArg->iv_entryPoint = const_cast<char*>("pnor::_sbe_pnor_start"); + l_otherArg->iv_mrr = CENTAUR_SBE_PNOR_MRR; uint64_t fapiArg = reinterpret_cast<uint64_t> (l_otherArg); myArgs.push_back(fapiArg); // Set FapiPoreVeMemArg for pnor option, base address = 0 uint32_t base_addr = 0; char* l_dataPnor = const_cast<char*>(l_sbePnorAddr); - //@todo - Need to somehow avoid manually entering file size here. FapiPoreVeMemArg* l_memArg = new FapiPoreVeMemArg(ARG_PNOR, - base_addr, 31360, static_cast<void*>(l_dataPnor)); + base_addr, l_sbePnorSize, + static_cast<void*>(l_dataPnor)); fapiArg = reinterpret_cast<uint64_t> (l_memArg); - myArgs.push_back(fapiArg); + myArgs.push_back(fapiArg); // Create state argument to dump out state for debugging purpose FapiPoreVeStateArg *l_stateArg = new FapiPoreVeStateArg(NULL); - l_stateArg->iv_installState = false; - l_stateArg->iv_extractState = true; - fapiArg = reinterpret_cast<uint64_t> (l_stateArg); - myArgs.push_back(fapiArg); + l_stateArg->iv_installState = false; + l_stateArg->iv_extractState = true; + fapiArg = reinterpret_cast<uint64_t> (l_stateArg); + myArgs.push_back(fapiArg); - // Create a FAPI Target - fapi::Target l_fapiTarget(fapi::TARGET_TYPE_PROC_CHIP, - reinterpret_cast<void *> (l_testTarget)); - //@todo - Comment out the actual run for now because - // the "halt" instruction causes poreve to scom SBEVITAL cfam reg, - // which causes an error in SIMICs. - // VBU model also has a hack that models this register - //l_rc = fapiPoreVe(l_fapiTarget, myArgs); - if (l_rc != fapi::FAPI_RC_SUCCESS) + // Run loop on all Centaurs + for ( ; l_pMemBufs; ++l_pMemBufs ) { - uint32_t val = l_rc; - FAPI_ERR("testPore1: Error from fapiPoreVe 0x%llX", val); + // Create a FAPI Target + const TARGETING::Target* l_membuf_target = *l_pMemBufs; + const fapi::Target l_fapiTarget( + fapi::TARGET_TYPE_MEMBUF_CHIP, + reinterpret_cast<void *> + (const_cast<TARGETING::Target*>(l_membuf_target))); + + // Put out info on target + FAPI_INF("testPore1: Running cen_sbe_tp_chiplet_init1 on Centaur entity path..."); + EntityPath l_path; + l_path = l_membuf_target->getAttr<ATTR_PHYS_PATH>(); + l_path.dump(); + + //@todo - Make sure target is present + // Temporary hack until PD works + if ( !FSI::isSlavePresent(l_membuf_target) ) + { + FAPI_INF("testPore1: Skip this Centaur because it's not present"); + continue; + } + + // Run the engine + FAPI_INF("testPore1: Start VSBE engine..."); + //@todo + //@VBU workaround - Do not run in VPO since it takes too long + //Temporarily disable this test case in VBU because it takes too long to run. + //Also, the image used for Centaur is only a temporary image provided by Todd to try out. + //When we have an official Centaur sbe_pnor image, use it to create a simple one to run + //test case. + if ( !TARGETING::is_vpo() ) + { + // @todo - Must comment out for now because Todd's image will fail test case + // l_rc = fapiPoreVe(l_fapiTarget, myArgs); + } + + if (l_rc != fapi::FAPI_RC_SUCCESS) + { + uint32_t val = l_rc; + FAPI_INF("testPore1: Error returned from VSBE engine on this Centaur, l_rc 0x%llX", + val); + break; + } + else + { + FAPI_INF("testPore1: VSBE engine runs successfully on this Centaur"); + } + + // @todo - For now, run only on 1 Centaur to save VPO time + break; + + + } // end for l_pMemBufs + + + // Freeing memory + if (l_otherArg) + { + delete l_otherArg; + l_otherArg = NULL; } - else + + if (l_memArg) + { + delete l_memArg; + l_memArg = NULL; + } + + if (l_stateArg) { - FAPI_INF("testPore1: fapiPoreVe runs successfully!"); + delete l_stateArg; + l_stateArg = NULL; } + + } while(0); // Unload sbe_pnor @@ -176,6 +253,18 @@ public: return; } + + /** + * @brief PORE test #2 + * Run a sample procedure on Proc + */ + void testPore2(void) + { + // @todo - Add code to run sbe image from Proc when available + + return; + } + }; #endif |