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authorAdam Muhle <armuhle@us.ibm.com>2013-01-02 16:16:56 -0600
committerA. Patrick Williams III <iawillia@us.ibm.com>2013-01-08 19:39:20 -0600
commitc1d3f833fa86a6f2e66a170992d6263f4742c122 (patch)
treebec4208938fac33bf3b1d252022f2a2e0a069c4c /src/usr/pnor
parenta8fb48155dcab207b59a3b5cd16c29264d0ba254 (diff)
downloadtalos-hostboot-c1d3f833fa86a6f2e66a170992d6263f4742c122.tar.gz
talos-hostboot-c1d3f833fa86a6f2e66a170992d6263f4742c122.zip
Improve PNOR DD Micron NOR Workaround
Improving the workaround implemented in Story 53201 to be more efficient. Changing to use the normal SFC polling to determine when the write/erase operations are complete and then reading the Micron Flag Status register once to keep the chip from getting into a bad state. This should reduce the traffic on the SPI bus. Change-Id: I315b165bcd3014a2c3121fd97594e73a2e6c1082 RTC: 61064 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2795 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/pnor')
-rw-r--r--src/usr/pnor/pnordd.C55
-rw-r--r--src/usr/pnor/pnordd.H11
2 files changed, 32 insertions, 34 deletions
diff --git a/src/usr/pnor/pnordd.C b/src/usr/pnor/pnordd.C
index abadd8117..b108fc0f3 100644
--- a/src/usr/pnor/pnordd.C
+++ b/src/usr/pnor/pnordd.C
@@ -5,7 +5,7 @@
/* */
/* IBM CONFIDENTIAL */
/* */
-/* COPYRIGHT International Business Machines Corp. 2011,2012 */
+/* COPYRIGHT International Business Machines Corp. 2011,2013 */
/* */
/* p1 */
/* */
@@ -696,14 +696,15 @@ errlHndl_t PnorDD::pollSfcOpComplete(uint64_t i_pollTime)
}
/**
- * @brief Poll for Op complete on Micron NOR chips
- * The current version of Micron parts require a special
- * form of checking for erase and write complete.
+ * @brief Check flag status bit on Micron NOR chips
+ * The current version of Micron parts require the Flag
+ * Status register be read after a read or erase operation,
+ * otherwise all future operations won't work..
*/
-errlHndl_t PnorDD::micronOpComplete(uint64_t i_pollTime)
+errlHndl_t PnorDD::micronFlagStatus(uint64_t i_pollTime)
{
errlHndl_t l_err = NULL;
- TRACDCOMP( g_trac_pnor, "PnorDD::micronOpComplete> i_pollTime=0x%.8x",
+ TRACDCOMP( g_trac_pnor, "PnorDD::micronFlagStatus> i_pollTime=0x%.8x",
i_pollTime );
do {
@@ -712,7 +713,7 @@ errlHndl_t PnorDD::micronOpComplete(uint64_t i_pollTime)
//Micron 'flag status' register
uint32_t confData = SPI_MICRON_FLAG_STAT << 24;
confData |= 0x00800001; // 8-> read, 1->1 bytes
- TRACDCOMP( g_trac_pnor, "PnorDD::micronOpComplete> confData=0x%.8x",
+ TRACDCOMP( g_trac_pnor, "PnorDD::micronFlagStatus> confData=0x%.8x",
confData );
l_err = writeRegSfc(SFC_CMD_SPACE,
SFC_REG_CHIPIDCONF,
@@ -720,7 +721,7 @@ errlHndl_t PnorDD::micronOpComplete(uint64_t i_pollTime)
if(l_err) { break; }
- //Poll for complete status
+ //Check flag status bit.
uint32_t opStatus;
uint64_t poll_time = 0;
uint64_t loop = 0;
@@ -764,21 +765,21 @@ errlHndl_t PnorDD::micronOpComplete(uint64_t i_pollTime)
if( (opStatus & 0xB0000000) != 0x80000000)
{
TRACFCOMP(g_trac_pnor,
- "PnorDD::micronOpComplete> Error or timeout from Micron Flag Status Register (0x%.8X)",
+ "PnorDD::micronFlagStatus> Error or timeout from Micron Flag Status Register (0x%.8X)",
opStatus);
/*@
* @errortype
- * @moduleid PNOR::MOD_PNORDD_MICRONOPCOMPLETE
+ * @moduleid PNOR::MOD_PNORDD_MICRONFLAGSTATUS
* @reasoncode PNOR::RC_MICRON_INCOMPLETE
* @userdata1[0:31] NOR Flash Chip ID
* @userdata1[32:63] Total poll time (ns)
* @userdata2[0:31] Micron Flag status register
- * @devdesc PnorDD::micronOpComplete> Error or timeout from
+ * @devdesc PnorDD::micronFlagStatus> Error or timeout from
* Micron Flag Status Register
*/
l_err = new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE,
- PNOR::MOD_PNORDD_MICRONOPCOMPLETE,
+ PNOR::MOD_PNORDD_MICRONFLAGSTATUS,
PNOR::RC_MICRON_INCOMPLETE,
TWO_UINT32_TO_UINT64(cv_nor_chipid,
poll_time),
@@ -793,7 +794,7 @@ errlHndl_t PnorDD::micronOpComplete(uint64_t i_pollTime)
//Micron 'flag status' register. remaining bits are all zero
// since we just need to issue the SPI command.
uint32_t confData = SPI_MICRON_CLRFLAG_STAT << 24;
- TRACDCOMP( g_trac_pnor, "PnorDD::micronOpComplete> confData=0x%.8x",
+ TRACDCOMP( g_trac_pnor, "PnorDD::micronFlagStatus> confData=0x%.8x",
confData );
errlHndl_t tmp_err = NULL;
tmp_err = writeRegSfc(SFC_CMD_SPACE,
@@ -993,16 +994,14 @@ errlHndl_t PnorDD::flushSfcBuf(uint32_t i_addr,
sfc_cmd.data32);
if(l_err) { break; }
- //check for special Micron Op Complete
+ //Poll for complete status
+ l_err = pollSfcOpComplete();
+ if(l_err) { break; }
+
+ //check for special Micron Flag Status reg
if(cv_hw_workaround & HWWK_MICRON_WRT_ERASE)
{
- l_err = micronOpComplete();
- if(l_err) { break; }
- }
- else //Use Normal Op Complete
- {
- //Poll for complete status
- l_err = pollSfcOpComplete();
+ l_err = micronFlagStatus();
if(l_err) { break; }
}
@@ -1648,16 +1647,14 @@ errlHndl_t PnorDD::eraseFlash(uint32_t i_address)
sfc_cmd.data32);
if(l_err) { break; }
- //check for special Micron Op Complete
+ //Poll for complete status
+ l_err = pollSfcOpComplete();
+ if(l_err) { break; }
+
+ //check for special Micron Flag Status reg
if(cv_hw_workaround & HWWK_MICRON_WRT_ERASE)
{
- l_err = micronOpComplete();
- if(l_err) { break; }
- }
- else //Use Normal Op Complete
- {
- //Poll for complete status
- l_err = pollSfcOpComplete();
+ l_err = micronFlagStatus();
if(l_err) { break; }
}
}
diff --git a/src/usr/pnor/pnordd.H b/src/usr/pnor/pnordd.H
index d74c6ba01..7f13e43c5 100644
--- a/src/usr/pnor/pnordd.H
+++ b/src/usr/pnor/pnordd.H
@@ -5,7 +5,7 @@
/* */
/* IBM CONFIDENTIAL */
/* */
-/* COPYRIGHT International Business Machines Corp. 2011,2012 */
+/* COPYRIGHT International Business Machines Corp. 2011,2013 */
/* */
/* p1 */
/* */
@@ -287,15 +287,16 @@ class PnorDD
errlHndl_t pollSfcOpComplete(uint64_t i_pollTime = SFC_POLL_TIME_NS);
/**
- * @brief Poll for Op complete on Micron NOR chips
- * The current version of Micron parts require a special
- * form of checking for erase and write complete.
+ * @brief Check flag status bit on Micron NOR chips
+ * The current version of Micron parts require the Flag
+ * Status register be read after a read or erase operation,
+ * otherwise all future operations won't work..
*
* @parm i_pollTime Amount of time to Poll, default SFC_POLL_TIME_NS
*
* @return Error from operation
*/
- errlHndl_t micronOpComplete(uint64_t i_pollTime = SFC_POLL_TIME_NS);
+ errlHndl_t micronFlagStatus(uint64_t i_pollTime = SFC_POLL_TIME_NS);
/**
* @brief Read the NOR FLash ChipID
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