Automating creation of PNOR image with TOC and Section data.

Wrote buildpnor.pl which builds PNOR image based on pnorLayout.xml file
and input binary files.  Setup makefiles to create PNOR if input
files change and to handle make clean.

Updated PNORRP to support new section offsets and new MVPD and
DIMM VPD sections.  Also updated PNORDD to use 4 MB of L3 Cache
as fake-PNOR.

Change-Id: Ic40670a45a53211a2414570d7fe5632e19bd44ed
RTC: 35043
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/819
Reviewed-by: Terry J. Opie <opiet@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

6 files changed, 54 insertions, 45 deletions

diff --git a/src/usr/pnor/pnordd.C b/src/usr/pnor/pnordd.C
index 4df0dab36..5b409e32c 100644
--- a/src/usr/pnor/pnordd.C
+++ b/src/usr/pnor/pnordd.C
@@ -987,9 +987,9 @@ errlHndl_t PnorDD::eraseFlash(uint32_t i_address)
  This code is used in the MODEL_MEMCPY and MODEL_LPC_MEM modes
 */
 
-#define FAKE_PNOR_START 5*MEGABYTE
+#define FAKE_PNOR_START 4*MEGABYTE
 #define FAKE_PNOR_END 8*MEGABYTE
-#define FAKE_PNOR_SIZE 3*MEGABYTE
+#define FAKE_PNOR_SIZE 4*MEGABYTE
 void write_fake_pnor( uint64_t i_pnorAddr, void* i_buffer, size_t i_size )
 {
     //create a pointer to the offset start.
diff --git a/src/usr/pnor/pnordd.H b/src/usr/pnor/pnordd.H
index 28d4f0b51..0ce538b4d 100644
--- a/src/usr/pnor/pnordd.H
+++ b/src/usr/pnor/pnordd.H
@@ -216,7 +216,7 @@ class PnorDD
 
         LPC_STAT_REG_ERROR_MASK = 0xFC0000000007F700, /**< Error Bits */
 
-        PNORSIZE = 3 * MEGABYTE, //@fixme - read from TOC instead
+        PNORSIZE = 4 * MEGABYTE, //@fixme - read from TOC instead
         ERASESIZE_BYTES = 4 * KILOBYTE, /**< Minimum Erase Block (bytes) */
         ERASESIZE_WORD32 = ERASESIZE_BYTES/(sizeof(uint32_t)), /**< Erase Block (32-bit words) */
 
diff --git a/src/usr/pnor/pnorrp.C b/src/usr/pnor/pnorrp.C
index a2175d06b..566358567 100644
--- a/src/usr/pnor/pnorrp.C
+++ b/src/usr/pnor/pnorrp.C
@@ -48,19 +48,20 @@ TRAC_INIT(&g_trac_pnor, "PNOR", 4096); //4K
  */
 const char* cv_EYECATCHER[] = {  //@todo - convert there to uint64_t
     "TOC",    /**< PNOR::TOC           : Table of Contents */
-    "GLOBAL", /**< PNOR::GLOBAL_DATA   : Global Data */
-    "SBE",    /**< PNOR::SBE_IPL       : Self-Boot Enginer IPL image */
-    "HBB",    /**< PNOR::HB_BASE_CODE  : Hostboot Base Image */
-    "HBD",    /**< PNOR::HB_DATA       : Hostboot Data */
-    "XXX",    /**< PNOR::HB_ERRLOGS    : Hostboot Error log Repository */
     "HBI",    /**< PNOR::HB_EXT_CODE   : Hostboot Extended Image */
-    "HBR",    /**< PNOR::HB_RUNTIME    : Hostboot Runtime Image */
-    "OPAL",   /**< PNOR::PAYLOAD       : HAL/OPAL */
-    "PFWL",   /**< PNOR::PFW_LITE_CODE : PFW-lite */
-    "OCC",    /**< PNOR::OCC_CODE      : OCC Code Image */
-    "PART",   /**< PNOR::KVM_PART_INFO : KVM Partition Information */
-    "XXX",    /**< PNOR::CODE_UPDATE   : Code Update Overhead */
-    "XXX",    /**< NUM_SECTIONS       : Used as invalid entry */
+    "HBD",    /**< PNOR::HB_DATA       : Hostboot Data */
+    "DJVPD",  /**< PNOR::DIMM_JEDEC_VPD: Dimm JEDEC VPD */ 
+    "MVPD",   /**< PNOR::MODULE_VPD    : Module VPD */ 
+
+    //Not currently used
+//    "GLOBAL", /**< PNOR::GLOBAL_DATA   : Global Data */
+//    "SBE",    /**< PNOR::SBE_IPL       : Self-Boot Enginer IPL image */
+//    "HBB",    /**< PNOR::HB_BASE_CODE  : Hostboot Base Image */
+//    "XXX",    /**< PNOR::HB_ERRLOGS    : Hostboot Error log Repository */
+//    "HBR",    /**< PNOR::HB_RUNTIME    : Hostboot Runtime Image */
+//    "PART",   /**< PNOR::KVM_PART_INFO : KVM Partition Information */
+//    "XXX",    /**< PNOR::CODE_UPDATE   : Code Update Overhead */
+//    "XXX",    /**< NUM_SECTIONS       : Used as invalid entry */
 };
 
 
@@ -344,30 +345,35 @@ errlHndl_t PnorRP::readTOC()
     // TOC starts at offset zero
 
     // put some random sizes in here
-    iv_TOC[PNOR::SIDE_A][PNOR::TOC].size = 8 + 8 + PNOR::NUM_SECTIONS*sizeof(TOCEntry_t);
-    iv_TOC[PNOR::SIDE_A][PNOR::HB_EXT_CODE].size = 1024*KILOBYTE; //1MB
-    iv_TOC[PNOR::SIDE_A][PNOR::GLOBAL_DATA].size = PAGESIZE; //4K
-    iv_TOC[PNOR::SIDE_A][PNOR::HB_DATA].size = 512*KILOBYTE; //512K
-
-    // fake PNOR will look like this:  TOC::HB_EXT_CODE:GLOBAL_DATA:HB_DATA
+    //sizes and offsets taken from pnorLayout.xml
+    iv_TOC[PNOR::SIDE_A][PNOR::TOC].size = 0x1000;
+    iv_TOC[PNOR::SIDE_A][PNOR::HB_EXT_CODE].size = 0x200000; //1MB
+    iv_TOC[PNOR::SIDE_A][PNOR::HB_DATA].size = 0x80000; //512K
+    iv_TOC[PNOR::SIDE_A][PNOR::MODULE_VPD].size = 0x80000; //512K
+    iv_TOC[PNOR::SIDE_A][PNOR::DIMM_JEDEC_VPD].size = 0x40000; //256K
+
+    // fake PNOR will look like this:  TOC::HB_EXT_CODE:HB_DATA:MODULE_VPD:DIMM_JEDEC_VPD
     // virtual addresses
     iv_TOC[PNOR::SIDE_A][PNOR::TOC].virtAddr = BASE_VADDR + 0;
-    iv_TOC[PNOR::SIDE_A][PNOR::HB_EXT_CODE].virtAddr = iv_TOC[PNOR::SIDE_A][PNOR::TOC].virtAddr + iv_TOC[PNOR::SIDE_A][PNOR::TOC].size;
-    iv_TOC[PNOR::SIDE_A][PNOR::GLOBAL_DATA].virtAddr = iv_TOC[PNOR::SIDE_A][PNOR::HB_EXT_CODE].virtAddr + iv_TOC[PNOR::SIDE_A][PNOR::HB_EXT_CODE].size;
-    iv_TOC[PNOR::SIDE_A][PNOR::HB_DATA].virtAddr = iv_TOC[PNOR::SIDE_A][PNOR::GLOBAL_DATA].virtAddr + iv_TOC[PNOR::SIDE_A][PNOR::GLOBAL_DATA].size;
-    // flash
+    iv_TOC[PNOR::SIDE_A][PNOR::HB_EXT_CODE].virtAddr = BASE_VADDR + 0x1000;
+    iv_TOC[PNOR::SIDE_A][PNOR::HB_DATA].virtAddr = BASE_VADDR + 0x201000;
+    iv_TOC[PNOR::SIDE_A][PNOR::MODULE_VPD].virtAddr = BASE_VADDR + 0x281000;
+    iv_TOC[PNOR::SIDE_A][PNOR::DIMM_JEDEC_VPD].virtAddr = BASE_VADDR + 0x301000;
+    // flash 
     iv_TOC[PNOR::SIDE_A][PNOR::TOC].flashAddr = 0;
-    iv_TOC[PNOR::SIDE_A][PNOR::HB_EXT_CODE].flashAddr = iv_TOC[PNOR::SIDE_A][PNOR::TOC].flashAddr + iv_TOC[PNOR::SIDE_A][PNOR::TOC].size;
-    iv_TOC[PNOR::SIDE_A][PNOR::GLOBAL_DATA].flashAddr = iv_TOC[PNOR::SIDE_A][PNOR::HB_EXT_CODE].flashAddr + iv_TOC[PNOR::SIDE_A][PNOR::HB_EXT_CODE].size;
-    iv_TOC[PNOR::SIDE_A][PNOR::HB_DATA].flashAddr = iv_TOC[PNOR::SIDE_A][PNOR::GLOBAL_DATA].flashAddr + iv_TOC[PNOR::SIDE_A][PNOR::GLOBAL_DATA].size;
+    iv_TOC[PNOR::SIDE_A][PNOR::HB_EXT_CODE].flashAddr = 0x1000;
+    iv_TOC[PNOR::SIDE_A][PNOR::HB_DATA].flashAddr = 0x201000;
+    iv_TOC[PNOR::SIDE_A][PNOR::MODULE_VPD].flashAddr = 0x281000;
+    iv_TOC[PNOR::SIDE_A][PNOR::DIMM_JEDEC_VPD].flashAddr = 0x301000;
 
     //@todo - end fake data
 
     //keep these traces here until PNOR is rock-solid
     TRACFCOMP(g_trac_pnor, "TOC:    size=0x%.8X  flash=0x%.8X  virt=0x%.16X", iv_TOC[PNOR::SIDE_A][PNOR::TOC].size, iv_TOC[PNOR::SIDE_A][PNOR::TOC].flashAddr, iv_TOC[PNOR::SIDE_A][PNOR::TOC].virtAddr );
     TRACFCOMP(g_trac_pnor, "EXT:    size=0x%.8X  flash=0x%.8X  virt=0x%.16X", iv_TOC[PNOR::SIDE_A][PNOR::HB_EXT_CODE].size, iv_TOC[PNOR::SIDE_A][PNOR::HB_EXT_CODE].flashAddr, iv_TOC[PNOR::SIDE_A][PNOR::HB_EXT_CODE].virtAddr );
-    TRACFCOMP(g_trac_pnor, "GLOBAL: size=0x%.8X  flash=0x%.8X  virt=0x%.16X", iv_TOC[PNOR::SIDE_A][PNOR::GLOBAL_DATA].size, iv_TOC[PNOR::SIDE_A][PNOR::GLOBAL_DATA].flashAddr, iv_TOC[PNOR::SIDE_A][PNOR::GLOBAL_DATA].virtAddr );
     TRACFCOMP(g_trac_pnor, "DATA:   size=0x%.8X  flash=0x%.8X  virt=0x%.16X", iv_TOC[PNOR::SIDE_A][PNOR::HB_DATA].size, iv_TOC[PNOR::SIDE_A][PNOR::HB_DATA].flashAddr, iv_TOC[PNOR::SIDE_A][PNOR::HB_DATA].virtAddr );
+    TRACFCOMP(g_trac_pnor, "MVPD: size=0x%.8X  flash=0x%.8X  virt=0x%.16X", iv_TOC[PNOR::SIDE_A][PNOR::MODULE_VPD].size, iv_TOC[PNOR::SIDE_A][PNOR::MODULE_VPD].flashAddr, iv_TOC[PNOR::SIDE_A][PNOR::MODULE_VPD].virtAddr );
+    TRACFCOMP(g_trac_pnor, "DJVPD: size=0x%.8X  flash=0x%.8X  virt=0x%.16X", iv_TOC[PNOR::SIDE_A][PNOR::DIMM_JEDEC_VPD].size, iv_TOC[PNOR::SIDE_A][PNOR::DIMM_JEDEC_VPD].flashAddr, iv_TOC[PNOR::SIDE_A][PNOR::DIMM_JEDEC_VPD].virtAddr );
 
     //@todo - load flash layout (how many chips)
     //@todo - read TOC on each chip/bank/whatever
diff --git a/src/usr/pnor/pnorrp.H b/src/usr/pnor/pnorrp.H
index 97a7fa80c..07e020034 100644
--- a/src/usr/pnor/pnorrp.H
+++ b/src/usr/pnor/pnorrp.H
@@ -102,7 +102,8 @@ class PnorRP
         uint64_t offset;  /**< Offset to region from zero (relative to chip) */
         uint64_t size;  /**< Size of region in bytes (with or without ECC?) */
         uint64_t size_act;  /**< Actual size of content in bytes */
-        char fuse_tbd[96];  /**< Remainder is TBD depending on FUSE requirements */
+        uint64_t misc;  /**< Miscellaneious Info */
+        char fuse_tbd[89];  /**< Free Space */
         //@todo - need a chip select here I think?
     } PACKED;
 
diff --git a/src/usr/pnor/test/pnorddtest.H b/src/usr/pnor/test/pnorddtest.H
index dd7034889..74e357cdf 100644
--- a/src/usr/pnor/test/pnorddtest.H
+++ b/src/usr/pnor/test/pnorddtest.H
@@ -40,7 +40,7 @@
 #include <list>
 #include <targeting/util.H>
 
-#define BASE_SCRATCH_SPACE (2*1024*1024+1024*512)  //2.5MB offset in fake PNOR
+#define BASE_SCRATCH_SPACE (3*1024*1024+1024*512)  //3.5MB offset in fake PNOR
 
 extern trace_desc_t* g_trac_pnor;
 
@@ -58,7 +58,7 @@ class PnorDdTest : public CxxTest::TestSuite
     /**
      * @brief PNOR DD readWriteTest
      *        Write some data to PNOR and read it back again
-     *        Using fakePNOR scratch space (2.5 - 3 MB)
+     *        Using fakePNOR scratch space (3.5 - 4 MB)
      */
     void test_readwrite(void)
     {
diff --git a/src/usr/pnor/test/pnorrptest.H b/src/usr/pnor/test/pnorrptest.H
index bdd28c2b8..d2f1fad2d 100644
--- a/src/usr/pnor/test/pnorrptest.H
+++ b/src/usr/pnor/test/pnorrptest.H
@@ -62,19 +62,21 @@ class PnorRpTest : public CxxTest::TestSuite
             uint64_t vaddr;
         };
         const ExpVals_t exp_data[] = {
-            /* TOC */ { 0x690, 0x80000000 },
-            /* GLOBAL_DATA */ { PAGESIZE, 0x80100690 },
-            /* SBE_IPL */ { 0, 0 },
-            /* HB_BASE_CODE */ { 0, 0 },
-            /* HB_DATA */ { 512*KILOBYTE, 0x80101690 },
-            /* HB_ERRLOGS */ { 0, 0 },
-            /* HB_EXT_CODE */ { 1024*KILOBYTE, 0x80000690 },
-            /* HB_RUNTIME */ { 0, 0 },
-            /* PAYLOAD */ { 0, 0 },
-            /* PFW_LITE_CODE */ { 0, 0 },
-            /* OCC_CODE */ { 0, 0 },
-            /* KVM_PART_INFO */ { 0, 0 },
-            /* CODE_UPDATE */ { 0, 0 },
+            /* TOC */ { 0x1000, 0x80000000 },
+            /* HB_EXT_CODE */ { 0x200000, 0x80001000 },
+            /* HB_DATA */ { 0x80000, 0x80201000 },
+            /* DIMM_JEDEC_VPD */ { 0x40000, 0x80301000 },
+            /* MODULE_VPD */ { 0x80000, 0x80281000 },
+            /* GLOBAL_DATA  { 0, 0 },*/
+            /* SBE_IPL  { 0, 0 },*/
+            /* HB_ERRLOGS  { 0, 0 },*/
+            /* HB_BASE_CODE  { 0, 0 },*/
+            /* HB_RUNTIME  { 0, 0 },*/
+            /* PAYLOAD  { 0, 0 },*/
+            /* PFW_LITE_CODE  { 0, 0 },*/
+            /* OCC_CODE  { 0, 0 },*/
+            /* KVM_PART_INFO  { 0, 0 },*/
+            /* CODE_UPDATE  { 0, 0 },*/
         };
 
         for( PNOR::SectionId id = PNOR::FIRST_SECTION;