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authorDan Crowell <dcrowell@us.ibm.com>2018-10-11 09:22:47 -0500
committerWilliam G. Hoffa <wghoffa@us.ibm.com>2018-10-11 17:53:08 -0500
commit627379aeaa27e30d66ebb0aecf218708d465162c (patch)
tree14782327cf978a2f05efdc74339990a8f8fceb37 /src/usr/lpc
parent30bd2ff53aa13e2d01bf02405f3e6eed3e576454 (diff)
downloadtalos-hostboot-627379aeaa27e30d66ebb0aecf218708d465162c.tar.gz
talos-hostboot-627379aeaa27e30d66ebb0aecf218708d465162c.zip
sio: Add test for availability - LPC error tweak
Some components can continue to operate in the face of the SuperIO controller being unavailable on the LPC bus (specifically, the UART and boot flag processing). Other components require it present (AST-based SFC implementations and the AST mailbox). Components in the latter category can just fail with an errl when they attempt to access the controller, but for those in the former category we add an isAvailable() function in the SIO namespace to sidestep dealing with errors. Specifically, isAvailable() tests for the expected error when the SuperIO controller is disabled, and returns an errlHndl_t if any other error occurs. This way true LPC errors are propagated to the caller to commit as desired. Change-Id: Ib94ceabfd4f4e9c63c114cfe3db3c954dbb6d6e5 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67315 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: ANDREW R. JEFFERY <andrewrj@au1.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/usr/lpc')
-rw-r--r--src/usr/lpc/lpcdd.C62
1 files changed, 53 insertions, 9 deletions
diff --git a/src/usr/lpc/lpcdd.C b/src/usr/lpc/lpcdd.C
index efcfa0346..8b5ee8db4 100644
--- a/src/usr/lpc/lpcdd.C
+++ b/src/usr/lpc/lpcdd.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2014,2017 */
+/* Contributors Listed Below - COPYRIGHT 2014,2018 */
/* [+] Google Inc. */
/* [+] International Business Machines Corp. */
/* */
@@ -217,15 +217,13 @@ errlHndl_t lpcWrite(DeviceFW::OperationType i_opType,
{
//First check/clear the LPC bus of errors and commit any errors found
l_err = Singleton<LpcDD>::instance().checkForLpcErrors();
- if (l_err)
+ if (!l_err)
{
- errlCommit(l_err, LPC_COMP_ID);
+ l_err = Singleton<LpcDD>::instance().writeLPC( l_type,
+ l_addr,
+ io_buffer,
+ io_buflen );
}
-
- l_err = Singleton<LpcDD>::instance().writeLPC( l_type,
- l_addr,
- io_buffer,
- io_buflen );
}
else
{
@@ -1187,7 +1185,53 @@ errlHndl_t LpcDD::checkForLpcErrors()
TRACFCOMP( g_trac_lpc, ERR_MRK"LpcDD::checkForLpcErrors> Error found in LPC Host Controller Status Register: 0x%8X",lpchc_err_union.data32);
computeLpchcErrSev(lpchc_err_union, l_lpchcResetLevel);
- if(l_lpchcResetLevel != RESET_CLEAR)
+ // Specifically check for a 'Sync AB' error as it is seen for
+ // security restrictions on BMC systems
+ if(lpchc_err_union.syncab)
+ {
+ TRACFCOMP( g_trac_lpc, ERR_MRK"Possible SIO Lockout issue with BMC");
+ /*@
+ * @errortype ERRL_SEV_UNRECOVERABLE
+ * @moduleid LPC::MOD_LPCDD_CHECKFORLPCERRORS
+ * @reasoncode LPC::RC_LPCHC_SYNCAB_ERROR
+ * @userdata1 LPCHC Error Status Register
+ * @userdata2 Reset Level
+ * @devdesc LpcDD::checkForLpcErrors> Sync AB error
+ * found in LPCHC, possible BMC/HB mismatch
+ * @custdesc Possible code mismatch for LPC bus usage
+ */
+ l_err = new ERRORLOG::ErrlEntry(
+ ERRORLOG::ERRL_SEV_UNRECOVERABLE,
+ LPC::MOD_LPCDD_CHECKFORLPCERRORS,
+ LPC::RC_LPCHC_SYNCAB_ERROR,
+ lpchc_buffer,
+ l_lpchcResetLevel);
+ // NOTE: This RC is being consumed by external code so it
+ // cannot be changed without taking that into account.
+
+ // Most likely this is a code mismatch between Hostboot
+ // and the BMC
+ l_err->addProcedureCallout( HWAS::EPUB_PRC_SP_CODE,
+ HWAS::SRCI_PRIORITY_HIGH );
+ l_err->addProcedureCallout( HWAS::EPUB_PRC_HB_CODE,
+ HWAS::SRCI_PRIORITY_MED );
+ // Could also be a HW failure
+ l_err->addHwCallout( iv_proc,
+ HWAS::SRCI_PRIORITY_LOW,
+ HWAS::NO_DECONFIG,
+ HWAS::GARD_NULL );
+
+ // Gather addtional ffdc data
+ addFFDC(l_err);
+ l_err->collectTrace(LPC_COMP_NAME);
+
+ if(l_lpchcResetLevel != RESET_CLEAR)
+ {
+ /* @todo - RTC:179179 Use l_opbmResetLevel **/
+ hwReset(RESET_OPB_LPCHC_HARD);
+ }
+ }
+ else if(l_lpchcResetLevel != RESET_CLEAR)
{
/*@
* @errortype ERRL_SEV_UNRECOVERABLE
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