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| author | Matthew Raybuck <matthew.raybuck@ibm.com> | 2019-11-07 12:17:41 -0600 |
|---|---|---|
| committer | Daniel M Crowell <dcrowell@us.ibm.com> | 2019-11-11 11:58:23 -0600 |
| commit | 7ddeb4d31a5f03587e8518fb1e0a518abaed6e04 (patch) | |
| tree | 0229d066ec16327a3c27e0388c48b54ec355e79f /src/usr/isteps | |
| parent | 4e071c33355df3d40d00d893e8587f42f5e10ab5 (diff) | |
| download | talos-hostboot-7ddeb4d31a5f03587e8518fb1e0a518abaed6e04.tar.gz talos-hostboot-7ddeb4d31a5f03587e8518fb1e0a518abaed6e04.zip | |
Add 100ms wait to disable write protection for BPM
There was an issue where without waiting after unlocking the BPM
registers we'd fail out of the BPM update. This commit adds a 100ms
delay after writing the unlock sequence before reading to verify that
the registers were unlocked.
Change-Id: Ic8cfeb8dba181d4071bb2d4dccaf367d88840cc2
CQ:SW480382
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/86707
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: TSUNG K YEUNG <tyeung@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/isteps')
| -rw-r--r-- | src/usr/isteps/nvdimm/bpm_update.C | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/usr/isteps/nvdimm/bpm_update.C b/src/usr/isteps/nvdimm/bpm_update.C index 013667925..3ffdb595b 100644 --- a/src/usr/isteps/nvdimm/bpm_update.C +++ b/src/usr/isteps/nvdimm/bpm_update.C @@ -2302,6 +2302,8 @@ errlHndl_t Bpm::disableWriteProtection() break; } + nanosleep(0, 100 * NS_PER_MSEC); + // Make sure protection was removed uint8_t data = 0; errl = nvdimmReadReg(iv_nvdimm, |
