diff options
author | crgeddes <crgeddes@us.ibm.com> | 2016-01-05 09:30:57 -0600 |
---|---|---|
committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-03-17 10:21:11 -0400 |
commit | d3b1b0c3058c0a24f6a59148723459e15e2e5673 (patch) | |
tree | 63f125fbf82feafcd2e67b7eb3ee3e025d26ab96 /src/usr/isteps | |
parent | f055a0587604e2e4dec08d4d39790685cc726fc2 (diff) | |
download | talos-hostboot-d3b1b0c3058c0a24f6a59148723459e15e2e5673.tar.gz talos-hostboot-d3b1b0c3058c0a24f6a59148723459e15e2e5673.zip |
Integrate HWPs for step 15
This commit includes work to create the call_HWP wrappers
for istep15.
RTC:133832
Change-Id: Ib0db5ac2b9b5d5f5c2967ff97794493d867fb04b
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/774
Reviewed-by: A. P. Williams III <iawillia@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Tested-by: Jenkins Server
Tested-by: FSP CI Jenkins
Diffstat (limited to 'src/usr/isteps')
-rw-r--r-- | src/usr/isteps/istep15/call_host_build_stop_image.C | 40 | ||||
-rw-r--r-- | src/usr/isteps/istep15/call_host_establish_ex_chiplet.C | 39 | ||||
-rw-r--r-- | src/usr/isteps/istep15/call_host_start_stop_engine.C | 40 | ||||
-rw-r--r-- | src/usr/isteps/istep15/call_proc_set_pba_homer_bar.C | 40 | ||||
-rw-r--r-- | src/usr/isteps/istep15/host_build_stop_image.C | 594 | ||||
-rw-r--r-- | src/usr/isteps/istep15/host_establish_ex_chiplet.C | 85 | ||||
-rw-r--r-- | src/usr/isteps/istep15/host_start_stop_engine.C | 93 | ||||
-rw-r--r-- | src/usr/isteps/istep15/makefile | 46 | ||||
-rw-r--r-- | src/usr/isteps/istep15/proc_set_pba_homer_bar.C | 97 | ||||
-rw-r--r-- | src/usr/isteps/istep21/call_host_start_payload.C | 18 |
10 files changed, 919 insertions, 173 deletions
diff --git a/src/usr/isteps/istep15/call_host_build_stop_image.C b/src/usr/isteps/istep15/call_host_build_stop_image.C deleted file mode 100644 index 243dfbc45..000000000 --- a/src/usr/isteps/istep15/call_host_build_stop_image.C +++ /dev/null @@ -1,40 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/usr/isteps/istep15/call_host_build_stop_image.C $ */ -/* */ -/* OpenPOWER HostBoot Project */ -/* */ -/* Contributors Listed Below - COPYRIGHT 2015 */ -/* [+] International Business Machines Corp. */ -/* */ -/* */ -/* Licensed under the Apache License, Version 2.0 (the "License"); */ -/* you may not use this file except in compliance with the License. */ -/* You may obtain a copy of the License at */ -/* */ -/* http://www.apache.org/licenses/LICENSE-2.0 */ -/* */ -/* Unless required by applicable law or agreed to in writing, software */ -/* distributed under the License is distributed on an "AS IS" BASIS, */ -/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ -/* implied. See the License for the specific language governing */ -/* permissions and limitations under the License. */ -/* */ -/* IBM_PROLOG_END_TAG */ - -#include <errl/errlentry.H> - -using namespace ERRORLOG; - -namespace ISTEP_15 -{ -void* call_host_build_stop_image (void *io_pArgs) -{ - errlHndl_t l_err = NULL; - //@TODO RTC:133832 call p9_hcode_image_build.C HWP - //@TODO RTC:133832 call p9_stop_gen_cpu_reg HWP - return l_err; -} - -}; diff --git a/src/usr/isteps/istep15/call_host_establish_ex_chiplet.C b/src/usr/isteps/istep15/call_host_establish_ex_chiplet.C deleted file mode 100644 index 531669028..000000000 --- a/src/usr/isteps/istep15/call_host_establish_ex_chiplet.C +++ /dev/null @@ -1,39 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/usr/isteps/istep15/call_host_establish_ex_chiplet.C $ */ -/* */ -/* OpenPOWER HostBoot Project */ -/* */ -/* Contributors Listed Below - COPYRIGHT 2015 */ -/* [+] International Business Machines Corp. */ -/* */ -/* */ -/* Licensed under the Apache License, Version 2.0 (the "License"); */ -/* you may not use this file except in compliance with the License. */ -/* You may obtain a copy of the License at */ -/* */ -/* http://www.apache.org/licenses/LICENSE-2.0 */ -/* */ -/* Unless required by applicable law or agreed to in writing, software */ -/* distributed under the License is distributed on an "AS IS" BASIS, */ -/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ -/* implied. See the License for the specific language governing */ -/* permissions and limitations under the License. */ -/* */ -/* IBM_PROLOG_END_TAG */ - -#include <errl/errlentry.H> - -using namespace ERRORLOG; - -namespace ISTEP_15 -{ -void* call_host_establish_ex_chiplet (void *io_pArgs) -{ - errlHndl_t l_err = NULL; - //@TODO RTC:133832 call p9_update_ec_eq_state.C HWP - return l_err; -} - -}; diff --git a/src/usr/isteps/istep15/call_host_start_stop_engine.C b/src/usr/isteps/istep15/call_host_start_stop_engine.C deleted file mode 100644 index 0d8b745cc..000000000 --- a/src/usr/isteps/istep15/call_host_start_stop_engine.C +++ /dev/null @@ -1,40 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/usr/isteps/istep15/call_host_start_stop_engine.C $ */ -/* */ -/* OpenPOWER HostBoot Project */ -/* */ -/* Contributors Listed Below - COPYRIGHT 2015 */ -/* [+] International Business Machines Corp. */ -/* */ -/* */ -/* Licensed under the Apache License, Version 2.0 (the "License"); */ -/* you may not use this file except in compliance with the License. */ -/* You may obtain a copy of the License at */ -/* */ -/* http://www.apache.org/licenses/LICENSE-2.0 */ -/* */ -/* Unless required by applicable law or agreed to in writing, software */ -/* distributed under the License is distributed on an "AS IS" BASIS, */ -/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ -/* implied. See the License for the specific language governing */ -/* permissions and limitations under the License. */ -/* */ -/* IBM_PROLOG_END_TAG */ - -#include <errl/errlentry.H> - -using namespace ERRORLOG; - -namespace ISTEP_15 -{ -void* call_host_start_stop_engine (void *io_pArgs) -{ - errlHndl_t l_err = NULL; - //@TODO RTC:133832 call p9_pm_stop_gpe_init HWP - //@TODO RTC:133832 call p9_pfet_init HWP - return l_err; -} - -}; diff --git a/src/usr/isteps/istep15/call_proc_set_pba_homer_bar.C b/src/usr/isteps/istep15/call_proc_set_pba_homer_bar.C deleted file mode 100644 index 552cba672..000000000 --- a/src/usr/isteps/istep15/call_proc_set_pba_homer_bar.C +++ /dev/null @@ -1,40 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/usr/isteps/istep15/call_proc_set_pba_homer_bar.C $ */ -/* */ -/* OpenPOWER HostBoot Project */ -/* */ -/* Contributors Listed Below - COPYRIGHT 2015 */ -/* [+] International Business Machines Corp. */ -/* */ -/* */ -/* Licensed under the Apache License, Version 2.0 (the "License"); */ -/* you may not use this file except in compliance with the License. */ -/* You may obtain a copy of the License at */ -/* */ -/* http://www.apache.org/licenses/LICENSE-2.0 */ -/* */ -/* Unless required by applicable law or agreed to in writing, software */ -/* distributed under the License is distributed on an "AS IS" BASIS, */ -/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ -/* implied. See the License for the specific language governing */ -/* permissions and limitations under the License. */ -/* */ -/* IBM_PROLOG_END_TAG */ - -#include <errl/errlentry.H> - -using namespace ERRORLOG; - -namespace ISTEP_15 -{ -void* call_proc_set_pba_homer_bar (void *io_pArgs) -{ - errlHndl_t l_err = NULL; - //@TODO RTC:133832 call p9_pm_set_homer_bar.C HWP - //@TODO RTC:133832 call p9_pm_pba_bar_config.C HWP - return l_err; -} - -}; diff --git a/src/usr/isteps/istep15/host_build_stop_image.C b/src/usr/isteps/istep15/host_build_stop_image.C new file mode 100644 index 000000000..b577f2994 --- /dev/null +++ b/src/usr/isteps/istep15/host_build_stop_image.C @@ -0,0 +1,594 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/isteps/istep15/host_build_stop_image.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ + + +////System +#include <sys/misc.h> +#include <sys/mmio.h> +#include <sys/mm.h> +#include <usr/vmmconst.h> +#include <arch/pirformat.H> + +//Error handling and tracing +#include <errl/errlentry.H> +#include <errl/errluserdetails.H> +#include <errl/errludtarget.H> +#include <errl/errlmanager.H> +#include <isteps/hwpisteperror.H> +#include <initservice/isteps_trace.H> + +//PNOR Resource Provider +#include <pnor/pnorif.H> + +//Targeting Support +#include <targeting/common/utilFilter.H> +#include <fapi2/target.H> + +//HWP Invoker +#include <fapi2/plat_hwp_invoker.H> + +//Import directory (from EKB repository) +#include <p9_hcode_image_build.H> +#include <p9_stop_api.H> +#include <p9_xip_image.h> +#include <p9_image_help_base.H> + +using namespace ERRORLOG; +using namespace ISTEP; +using namespace ISTEP_ERROR; +using namespace TARGETING; +using namespace PNOR; +using namespace stopImageSection; +using namespace fapi2; + +namespace ISTEP_15 +{ + + +/** + * @brief Load HCODE image and return a pointer to it, or NULL + * + * @param[out] - address of the HCODE image + * @param[out] - size of the HCODE image + * + * @return NULL if success, errorlog if failure + * + */ +errlHndl_t loadHcodeImage( char *& o_rHcodeAddr, + uint32_t & o_rHcodeSize ) +{ + errlHndl_t l_errl = NULL; + PNOR::SectionInfo_t l_info; +// uint64_t rc = 0; + o_rHcodeSize = 0; + + do + { + // Get WINK PNOR section info from PNOR RP + l_errl = PNOR::getSectionInfo( PNOR::WINK, l_info ); + if( l_errl ) + { + break; + } + +//@TODO RTC: 147560 Enable checks and manipulation on the hcode image +// rc = p9_xip_image_size(reinterpret_cast<void*>(l_info.vaddr), +// &o_rHcodeSize); + +// if((rc !=0) || (o_rHcodeSize == 0) || o_rHcodeSize > l_info.size) +// { +// TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, +// "ERROR: invalid WINK image rc[%d] hcodeSize[%d] part size[%d]", +// rc, o_rHcodeSize, l_info.size); +// /*@ +// * @errortype +// * @reasoncode RC_LOAD_HCODE_FROM_PNOR_FAILED +// * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE +// * @moduleid MOD_BUILD_HCODE_IMAGES +// * @userdata1 Hi 32 bits: return code from sbe_xip_image_size +// * Lo 32 bits: Size of memory requested +// * @userdata2 Size of WINK PNOR partition +// * @devdesc Image from PNOR WINK partition invalid, too small, +// * or too big +// * @custdesc A problem occurred during the IPL +// * of the system. +// */ +// l_errl = +// new ERRORLOG::ErrlEntry( ERRORLOG::ERRL_SEV_UNRECOVERABLE, +// ISTEP::MOD_BUILD_HCODE_IMAGES, +// ISTEP::RC_LOAD_HCODE_FROM_PNOR_FAILED, +// (rc<<32)|o_rHcodeSize, +// l_info.size, +// true); +// break; +// } + + o_rHcodeAddr = reinterpret_cast<char*>(l_info.vaddr); + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "HCODE addr = 0x%p, size=0x%x", + o_rHcodeAddr, + o_rHcodeSize ); + + } while ( 0 ); + + return l_errl; +} + +/** + * @brief apply cpu reg information to the HCODE image using + * p9_stop_save_cpureg() . + * + * @param i_procChipTarg - proc target + * @param io_image - pointer to the HCODE image + * @param i_sizeImage - size of the HCODE image + * + * @return errorlog if error, NULL otherwise. + * + */ +errlHndl_t applyHcodeGenCpuRegs( TARGETING::Target *i_procChipTarg, + void *io_image, + uint32_t i_sizeImage ) +{ + errlHndl_t l_errl = NULL; + + //Use TARGETING code to look up CORE target handles + TARGETING::TargetHandleList l_coreIds; + getChildChiplets( l_coreIds, + i_procChipTarg, + TYPE_CORE, + false ); + + TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "applyHcodeGenCpuRegs: Process cores=0x%x, threads=0x%x", + l_coreIds.size(), + cpu_thread_count() ); + + //Thread tracking + const size_t l_cpu_thread_count = cpu_thread_count(); + TARGETING::ATTR_CHIP_UNIT_type l_coreId = 0; + size_t l_threadId = 0; + //Error Handling + uint32_t l_rc = 0; + uint32_t l_failAddr = 0; + //Register Values + uint64_t l_msrVal = cpu_spr_value(CPU_SPR_MSR) ; + uint64_t l_lpcrVal = cpu_spr_value( CPU_SPR_LPCR); + + // See LPCR def, PECE "reg" in Power ISA AS Version: Power8 June 27, 2012 + // and 23.7.3.5 - 6 in Murano Book 4 + l_lpcrVal &= ~(0x0000000000002000) ; + +//@TODO RTC:147565 +//Force Core Checkstops by telling ACTION1 Reg after coming out of winkle +// Core FIR Action1 Register value from Nick +// const uint64_t action1_reg = 0xEA5C139705980000; + + //Get top-lvl system target with TARGETING code to find the enabled threads + TARGETING::Target* sys = NULL; + TARGETING::targetService().getTopLevelTarget(sys); + assert( sys != NULL ); + uint64_t en_threads = sys->getAttr<ATTR_ENABLED_THREADS>(); + + //look up the HRMOR value from the HRMOR CPU special purpose register(SPR) + uint64_t l_hrmorVal = cpu_spr_value(CPU_SPR_HRMOR); + + //iterate through the cores while copying information from SPRs + for (const auto & l_core: l_coreIds) + { + // trace the HUID of the core we are writing to + TRACDCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "target HUID %.8X", TARGETING::get_huid(l_core)); + + l_threadId = 0; + + //Get core's parent processor target handle + ConstTargetHandle_t l_processor = getParentChip(l_core); + + //Read core's chip unit id attribute and store it as the core's id + CHIP_UNIT_ATTR l_coreId = + (l_core)->getAttr<TARGETING::ATTR_CHIP_UNIT>(); + //Read the processor's fabric group id + FABRIC_GROUP_ID_ATTR l_logicalGroupId = + l_processor->getAttr<TARGETING::ATTR_FABRIC_GROUP_ID>(); + + //Read the processor's fabric chip id + FABRIC_CHIP_ID_ATTR l_chipId = + l_processor->getAttr<TARGETING::ATTR_FABRIC_CHIP_ID>(); + + TRACDCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "chip unit: %d fabric group: %d chip id: %d", + l_coreId, l_logicalGroupId,l_chipId); + + //store the PIR value by passing the values read in above into the + //PIR_t constructor and read the .word attribute on the new PIR struct + uint64_t l_pirVal = PIR_t(l_logicalGroupId, l_chipId, l_coreId).word; + + //Call p9_stop_save_cpureg from p9_stop_api to store the MSR SPR value + l_rc = p9_stop_save_cpureg( io_image, + P9_STOP_SPR_MSR, + l_msrVal, + l_pirVal); + if ( l_rc ) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR: MSR: core=0x%x,thread=0x%x,l_rc=0x%x", + l_coreId, l_threadId, l_rc ); + l_failAddr = P9_STOP_SPR_MSR; + break; + } + + + //Call p9_stop_save_cpureg from p9_stop_api to store the HRMOR SPR value + l_rc = p9_stop_save_cpureg( io_image, + P9_STOP_SPR_HRMOR, + l_hrmorVal, + l_pirVal); + + if ( l_rc ){ + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR: HRMOR: core=0x%x,thread=0x%x,l_rc=0x%x", + l_coreId, l_threadId, l_rc ); + l_failAddr = P9_STOP_SPR_HRMOR; + break; + } + + // fill in lpcr for each thread + for ( l_threadId=0; l_threadId < l_cpu_thread_count; l_threadId++ ) + { + // Skip threads that we shouldn't be starting + if( !(en_threads & (0x8000000000000000>>l_threadId)) ) + { + continue; + } + + TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "applyHcodeGenCpuRegs: core=0x%x,thread=0x%x: ", + l_coreId, l_threadId ); + TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "applyHcodeGenCpuRegs: msrc=0x%x,lpcr=0x%x,hrmor=0x%x", + l_msrVal, l_lpcrVal, l_hrmorVal ); + + //the thread ID is the last 3 bytes of pirVal so you can just OR + l_pirVal |= l_threadId; + + //Call p9_stop_save_cpureg from p9_stop_api + //to store the LPCR SPR value + l_rc = p9_stop_save_cpureg( io_image, + P9_STOP_SPR_LPCR, + l_lpcrVal, + l_pirVal); + if ( l_rc ) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR: LPCR: core=0x%x,thread=0x%x,l_rc=0x%x", + l_coreId, l_threadId, l_rc ); + l_failAddr = P9_STOP_SPR_LPCR; + break; + } + } // end for l_threadId + + // if error writing thread break out of l_coreId loop + if ( l_rc !=0 ) + { + break; + } +//@TODO RTC:147565 +//Force Core Checkstops by telling ACTION1 Reg after coming out of winkle +//@fixme HACK in place for OPAL + // Need to force core checkstops to escalate to a system checkstop + // by telling the HCODE to update the ACTION1 register when it + // comes out of winkle (see HW286670) +// l_rc = p8_pore_gen_scom_fixed( io_image, +// P8_SLW_MODEBUILD_IPL, +// EX_CORE_FIR_ACTION1_0x10013107, +// l_coreId, +// action1_reg, +// P8_PORE_SCOM_REPLACE, +// P8_SCOM_SECTION_NC ); +// if( l_rc ) +// { +// TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, +// "ERROR: ACTION1: core=0x%x,l_rc=0x%x", +// l_coreId, l_rc ); +// l_failAddr = EX_CORE_FIR_ACTION1_0x10013107; +// break; +// } + + } // end for l_coreIds + + if ( l_rc ){ + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR: p9 stop api fail core=0x%x, thread=0x%x, l_rc=0x%x", + l_coreId, l_threadId, l_rc ); + /*@ + * @errortype + * @reasoncode ISTEP::RC_BAD_RC + * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE + * @moduleid ISTEP::MOD_BUILD_HCODE_IMAGES + * @userdata1 Hi 32 bits: return code from p8_pore_gen_scom_fixed + * Lo 32 bits: Address of EX_CORE_FIR_ACTION1_0x10013107 + * @userdata2 Hi 32 bits: ID of core + * Lo 32 bits: Thread id + * @devdesc Unable to force core checkstops by updating ACTION1 + * when it comes out of winkle + * @custdesc A problem occurred during the IPL + * of the system. + */ + l_errl = new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE, + ISTEP::MOD_BUILD_HCODE_IMAGES, + ISTEP::RC_BAD_RC, + TWO_UINT32_TO_UINT64(l_rc,l_failAddr), + TWO_UINT32_TO_UINT64(l_coreId,l_threadId), + true); + l_errl->collectTrace(FAPI_TRACE_NAME,256); + l_errl->collectTrace(FAPI_IMP_TRACE_NAME,256); + l_errl->collectTrace("ISTEPS_TRACE",256); + } + + return l_errl; +} + +void* host_build_stop_image (void *io_pArgs) +{ + errlHndl_t l_errl = NULL; + ISTEP_ERROR::IStepError l_StepError; + + char* l_pHcodeImage = NULL; + uint32_t l_hcodeSize = 0; + void* l_pRealMemBase = NULL; + void* l_pVirtMemBase = NULL; + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "host_build_stop_image entry" ); + + // allocate a temporary buffer + void* l_temp_buffer = malloc(FIXED_RING_BUF_SIZE); + + + do { + // Get the node-offset for our instance by looking at the HRMOR + uint64_t l_memBase = cpu_spr_value(CPU_SPR_HRMOR); + // mask off the secureboot offset + l_memBase = 0xFFFFF00000000000 & l_memBase; + + // Now offset up to our hardcoded region + l_memBase += VMM_HOMER_REGION_START_ADDR; + + // Get a chunk of real memory big enough to store all the possible + // HCODE images. (4MB is size of HOMER) + + assert(VMM_HOMER_REGION_SIZE <= (P9_MAX_PROCS * (4 * MEGABYTE)), + "host_build_stop_image: Unsupported HOMER Region size"); + + //If running Sapphire need to place this at the top of memory instead + if(is_sapphire_load()) + { + l_memBase = get_top_mem_addr(); + assert (l_memBase != 0, + "host_build_stop_image: Top of memory was 0!"); + l_memBase -= VMM_ALL_HOMER_OCC_MEMORY_SIZE; + } + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "HOMER base = %x", l_memBase); + + l_pRealMemBase = reinterpret_cast<void * const>(l_memBase ); + + //Convert the real memory pointer to a pointer in virtual memory + l_pVirtMemBase = + mm_block_map(l_pRealMemBase, VMM_HOMER_REGION_SIZE); + + TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "Got virtual mem buffer for %d cpus = 0x%p", + P9_MAX_PROCS, + l_pVirtMemBase ); + + // Continue, build hcode images + + //Load the reference image from PNOR + l_errl = loadHcodeImage( l_pHcodeImage, + l_hcodeSize ); + if ( l_errl ) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "host_build_stop_image ERROR : errorlog PLID=0x%x", + l_errl->plid() ); + + // drop out of do block with errorlog. + break; + } + + + // Loop through all functional Procs and generate images for them. + TARGETING::TargetHandleList l_procChips; + getAllChips( l_procChips, + TARGETING::TYPE_PROC ); + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "Found %d procs in system", + l_procChips.size() ); + + for (const auto & l_procChip: l_procChips) + { + do { + + // write the HUID of the core we are writing to + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "Build STOP image for proc " + "target HUID %.8X", TARGETING::get_huid(l_procChip)); + + + // calculate size and location of the HCODE output buffer + uint32_t l_procNum = + l_procChip->getAttr<TARGETING::ATTR_POSITION>(); + uint64_t l_procOffsetAddr = + ( l_procNum *VMM_HOMER_INSTANCE_SIZE ); + + uint64_t l_procRealMemAddr = + reinterpret_cast<uint64_t>(l_pRealMemBase) + + l_procOffsetAddr; + + void *l_pImageOut = + reinterpret_cast<void * const> + (reinterpret_cast<uint64_t>(l_pVirtMemBase) + + l_procOffsetAddr) ; + + uint32_t l_sizeImageOut = + ((P9_MAX_PROCS * (4 * MEGABYTE))); + + // set default values, p9_hcode_build will provide actual size + l_procChip->setAttr<TARGETING::ATTR_HCODE_IMAGE_ADDR> + ( l_procRealMemAddr ); + l_procChip->setAttr<TARGETING::ATTR_HCODE_IMAGE_SIZE> + ( l_sizeImageOut ) ; + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "Real mem buffer for cpu 0x%08x = %p, virtAddr=%p", + l_procNum, + l_procRealMemAddr, + l_pImageOut); + + // cast OUR type of target to a FAPI2 type of target. + const fapi2::Target<TARGET_TYPE_PROC_CHIP> + l_fapi_cpu_target( const_cast<TARGETING::Target*>(l_procChip)); + + ImageType_t img_type; + + //Call p9_hcode_image_build.C HWP +// FAPI_INVOKE_HWP( l_errl, +// p9_hcode_image_build, +// l_fapi_cpu_target, //Proc chip target. +// reinterpret_cast<void*>(l_pHcodeImage), +// l_pImageOut, +// PHASE_IPL, //sys_Phase +// img_type, +// l_temp_buffer) + if ( l_errl ) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "host_build_stop_image ERROR : errorlog PLID=0x%x", + l_errl->plid() ); + + // drop out of block with errorlog. + break; + } + + + // set the actual size of the image now. + l_procChip->setAttr<TARGETING::ATTR_HCODE_IMAGE_SIZE> + ( l_sizeImageOut ); + +//@TODO RTC: 147560 Enable checks and manipulation on the hcode image +// l_errl = applyHcodeGenCpuRegs( l_procChip, +// l_pImageOut, +// l_sizeImageOut ); + if ( l_errl ) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "applyHcodeGenCpuRegs ERROR : errorlog PLID=0x%x", + l_errl->plid() ); + + // drop out of block with errorlog. + break; + } + else + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "applyHcodeGenCpuRegs SUCCESS " ); + } + + } while (0) ; + + // broke out due to an error, store all the details away, store + // the errlog in IStepError, and continue to next proc + if (l_errl) + { + // capture the target data in the elog + ErrlUserDetailsTarget(l_procChip).addToLog( l_errl ); + + // Create IStep error log and cross ref error that occurred + l_StepError.addErrorDetails( l_errl ); + + // Commit Error + errlCommit( l_errl, HWPF_COMP_ID ); + } + + } ; // endfor + + } while (0); + // @@@@@ END CUSTOM BLOCK: @@@@@ + + if (l_errl) + { + // Create IStep error log and cross ref error that occurred + l_StepError.addErrorDetails( l_errl ); + + // Commit Error + errlCommit( l_errl, HWPF_COMP_ID ); + } + + // delete working buffers + if( l_temp_buffer ) { free(l_temp_buffer); } + + if(l_pVirtMemBase) + { + int rc = 0; + rc = mm_block_unmap(l_pVirtMemBase); + if (rc != 0) + { + /*@ + * @errortype + * @reasoncode ISTEP::RC_MM_UNMAP_ERR + * @moduleid ISTEP::MOD_BUILD_HCODE_IMAGES + * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE + * @userdata1 Return Code + * @userdata2 Unmap address + * @devdesc mm_block_unmap() returns error + * @custdesc A problem occurred during the IPL + * of the system. + */ + l_errl = + new ERRORLOG::ErrlEntry( + ERRORLOG::ERRL_SEV_UNRECOVERABLE, + ISTEP::MOD_BUILD_HCODE_IMAGES, + ISTEP::RC_MM_UNMAP_ERR, + rc, + reinterpret_cast<uint64_t> + (l_pVirtMemBase)); + + // Create IStep error log and cross reference error that occurred + l_StepError.addErrorDetails( l_errl ); + + // Commit error + errlCommit( l_errl, ISTEP_COMP_ID ); + } + } + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "host_build_stop_image exit" ); + + // end task, returning any errorlogs to IStepDisp + return l_StepError.getErrorHandle(); +} +}; diff --git a/src/usr/isteps/istep15/host_establish_ex_chiplet.C b/src/usr/isteps/istep15/host_establish_ex_chiplet.C new file mode 100644 index 000000000..e96394007 --- /dev/null +++ b/src/usr/isteps/istep15/host_establish_ex_chiplet.C @@ -0,0 +1,85 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/isteps/istep15/host_establish_ex_chiplet.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ + +//From Hostboot Directory +////Error handling and traces +#include <errl/errlentry.H> +#include <errl/errluserdetails.H> +#include <errl/errludtarget.H> +#include <errl/errlmanager.H> +#include <isteps/hwpisteperror.H> +#include <initservice/isteps_trace.H> + +//HWP Invoker +#include <fapi2/plat_hwp_invoker.H> + +//Targeting Support +#include <targeting/common/utilFilter.H> +#include <fapi2/target.H> + +//From Import Directory (EKB Repository) +#include <p9_update_ec_eq_state.H> + +//Namespaces +using namespace ERRORLOG; +using namespace TARGETING; +using namespace fapi2; + +namespace ISTEP_15 +{ +void* host_establish_ex_chiplet (void *io_pArgs) +{ + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "host_establish_ex_chiplet entry" ); + ISTEP_ERROR::IStepError l_StepError; + errlHndl_t l_errl = NULL; + do { + //Use targeting code to get a list of all processors + TARGETING::TargetHandleList l_procChips; + getAllChips( l_procChips, TARGETING::TYPE_PROC ); + + for (const auto & l_procChip: l_procChips) + { + const fapi2::Target<TARGET_TYPE_PROC_CHIP> + l_fapi_cpu_target(l_procChip); + // call p9_update_ec_eq_state.C HWP + FAPI_INVOKE_HWP( l_errl, + p9_update_ec_eq_state, + l_fapi_cpu_target); + + if(l_errl) + { + ErrlUserDetailsTarget(l_procChip).addToLog(l_errl); + l_StepError.addErrorDetails( l_errl ); + errlCommit( l_errl, HWPF_COMP_ID ); + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "host_establish_ex_chiplet:: failed on proc with HUID : %d",TARGETING::get_huid(l_procChip) ); + } + } + }while(0); + + // end task, returning any errorlogs to IStepDisp + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "host_establish_ex_chiplet exit" ); + return l_StepError.getErrorHandle(); +} +}; diff --git a/src/usr/isteps/istep15/host_start_stop_engine.C b/src/usr/isteps/istep15/host_start_stop_engine.C new file mode 100644 index 000000000..7f3bdbbcb --- /dev/null +++ b/src/usr/isteps/istep15/host_start_stop_engine.C @@ -0,0 +1,93 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/isteps/istep15/host_start_stop_engine.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ + +//From Hostboot Directory +////Error handling and traces +#include <errl/errlentry.H> +#include <errl/errlmanager.H> +#include <isteps/hwpisteperror.H> +#include <initservice/isteps_trace.H> +#include <errl/errluserdetails.H> +#include <errl/errludtarget.H> + +//HWP Invoker +#include <fapi2/plat_hwp_invoker.H> + +////Targeting support +#include <fapi2/target.H> +#include <targeting/common/utilFilter.H> + +//From Import Directory (EKB Repository) +#include <p9_pm.H> +#include <p9_pm_stop_gpe_init.H> + +//Namespaces +using namespace ERRORLOG; +using namespace TARGETING; +using namespace p9pm; +using namespace fapi2; + +namespace ISTEP_15 +{ +void* host_start_stop_engine (void *io_pArgs) +{ + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_host_start_stop_engine entry" ); + ISTEP_ERROR::IStepError l_StepError; + errlHndl_t l_errl = NULL; + + do { + //Use targeting code to get a list of all processors + TARGETING::TargetHandleList l_procChips; + getAllChips( l_procChips, TARGETING::TYPE_PROC ); + + for (const auto & l_procChip: l_procChips) + { + //Convert the TARGETING::Target into a fapi2::Target by passing + //the const_casted l_procChip into the fapi::Target constructor + fapi2::Target<TARGET_TYPE_PROC_CHIP>l_fapi2_cpu_target( + (l_procChip)); + +//RTC:149398 Re-enable when new vector constructor is implemented + //call p9_pm_stop_gpe_init.C HWP +// FAPI_INVOKE_HWP(l_errl, +// p9_pm_stop_gpe_init, +// l_fapi2_cpu_target, +// PM_INIT); + if(l_errl) + { + ErrlUserDetailsTarget(l_procChip).addToLog(l_errl); + l_StepError.addErrorDetails( l_errl ); + errlCommit( l_errl, HWPF_COMP_ID ); + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "host_start_stop_engine:: failed on proc with HUID : %d",TARGETING::get_huid(l_procChip) ); + } + } + }while (0); + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_host_start_stop_engine exit" ); + // end task, returning any errorlogs to IStepDisp + return l_StepError.getErrorHandle(); +} + +}; diff --git a/src/usr/isteps/istep15/makefile b/src/usr/isteps/istep15/makefile index 392773dc8..4dfceaa2d 100644 --- a/src/usr/isteps/istep15/makefile +++ b/src/usr/isteps/istep15/makefile @@ -5,7 +5,7 @@ # # OpenPOWER HostBoot Project # -# Contributors Listed Below - COPYRIGHT 2015 +# Contributors Listed Below - COPYRIGHT 2015,2016 # [+] International Business Machines Corp. # # @@ -24,10 +24,46 @@ # IBM_PROLOG_END_TAG ROOTPATH = ../../../.. MODULE = istep15 +PROCEDURES_PATH = ${ROOTPATH}/src/import/chips/p9/procedures + +EXTRAINCDIR += ${PROCEDURES_PATH}/hwp/pm/ +EXTRAINCDIR += ${PROCEDURES_PATH}/stop_reg/ +EXTRAINCDIR += ${PROCEDURES_PATH}/hwp/lib/ +EXTRAINCDIR += ${PROCEDURES_PATH}/utils/stopreg/ +EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/common/include/ +EXTRAINCDIR += ${ROOTPATH}/src/import/hwpf/fapi2/include/ +EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/xip/ +EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/utils/ +EXTRAINCDIR += ${ROOTPATH}/src/include/usr/fapi2/ +EXTRAINCDIR += ${ROOTPATH}/obj/genfiles/ +EXTRAINCDIR += ${PROCEDURES_PATH}/ppe/include/registers/ + +OBJS += host_build_stop_image.o +OBJS += proc_set_pba_homer_bar.o +OBJS += host_establish_ex_chiplet.o +OBJS += host_start_stop_engine.o + +#@TODO RTC:147621 Pull p9_stop_util into a seperate library +OBJS += p9_stop_util.o + + +include ${ROOTPATH}/procedure.rules.mk +include $(PROCEDURES_PATH)/hwp/pm/p9_pm_pfet_init.mk +include $(PROCEDURES_PATH)/hwp/pm/p9_pm_pba_bar_config.mk +include $(PROCEDURES_PATH)/hwp/pm/p9_pm_set_homer_bar.mk +# include $(PROCEDURES_PATH)/hwp/pm/p9_pm_stop_gpe_init.mk +include $(PROCEDURES_PATH)/hwp/pm/p9_pm_utils.mk +include $(PROCEDURES_PATH)/hwp/pm/p9_update_ec_eq_state.mk +include $(PROCEDURES_PATH)/hwp/pm/p9_hcode_image_build.mk +include $(PROCEDURES_PATH)/utils/stopreg/p9_stop_api.mk +# include $(PROCEDURES_PATH)/hwp/pm/p9_pm_pba_init.mk +include ${ROOTPATH}/src/import/chips/p9/xip/p9_xip_image.mk + + -OBJS += call_host_build_stop_image.o -OBJS += call_proc_set_pba_homer_bar.o -OBJS += call_host_establish_ex_chiplet.o -OBJS += call_host_start_stop_engine.o include ${ROOTPATH}/config.mk + +VPATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/pm/ +VPATH += ${ROOTPATH}/src/import/chips/p9/procedures/utils/stopreg/ +VPATH += ${ROOTPATH}/src/import/chips/p9/xip/
\ No newline at end of file diff --git a/src/usr/isteps/istep15/proc_set_pba_homer_bar.C b/src/usr/isteps/istep15/proc_set_pba_homer_bar.C new file mode 100644 index 000000000..983fc4d31 --- /dev/null +++ b/src/usr/isteps/istep15/proc_set_pba_homer_bar.C @@ -0,0 +1,97 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/usr/isteps/istep15/proc_set_pba_homer_bar.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ + + +//From Hostboot Directory +////System + #include <limits.h> + #include <sys/misc.h> + +////Error handling and traces + #include <errl/errluserdetails.H> + #include <errl/errlmanager.H> + #include <errl/errlentry.H> + #include <errl/errludtarget.H> + #include <isteps/hwpisteperror.H> + #include <initservice/isteps_trace.H> + +////Targeting support + #include <targeting/common/utilFilter.H> + #include <fapi2/plat_hwp_invoker.H> + #include <fapi2/target.H> + +//From Import Directory (EKB Repository) +#include <return_code.H> +#include <p9_pm_set_homer_bar.H> + +//Namespaces +using namespace ERRORLOG; +using namespace TARGETING; +using namespace fapi2; + +namespace ISTEP_15 +{ +void* proc_set_pba_homer_bar (void *io_pArgs) +{ + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_proc_set_pba_homer_bar entry" ); + ISTEP_ERROR::IStepError l_StepError; + errlHndl_t l_errl = NULL; + TARGETING::TargetHandleList l_procChips; + + //Use targeting code to get a list of all processors + getAllChips( l_procChips, TARGETING::TYPE_PROC ); + + //Loop through all of the procs and call the HWP on each one + for (const auto & l_procChip: l_procChips) + { + + //Convert the TARGETING::Target into a fapi2::Target by passing + //the const_casted l_procChip into the fapi::Target constructor + const fapi2::Target<TARGET_TYPE_PROC_CHIP> + l_fapi_cpu_target((l_procChip)); + + //call p9_pm_set_homer_bar.C HWP + //TODO RTC:147693 + //Need to determine what address this procedures is actually expecting +// const uint64_t homerAddr = l_procChip->getAttr<TARGETING::ATTR_HOMER_PHYS_ADDR>(); +// FAPI_INVOKE_HWP( l_errl, +// p9_pm_set_homer_bar, +// l_fapi_cpu_target, +// homerAddr + HOMER_OFFSET_TO_OCC_IMG, +// 3); + + if(l_errl) + { + l_StepError.addErrorDetails( l_errl ); + errlCommit( l_errl, HWPF_COMP_ID ); + } + } + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_proc_set_pba_homer_bar exit" ); + // end task, returning any errorlogs to IStepDisp + return l_StepError.getErrorHandle(); +} + +}; diff --git a/src/usr/isteps/istep21/call_host_start_payload.C b/src/usr/isteps/istep21/call_host_start_payload.C index 886a5b4f4..07eb58363 100644 --- a/src/usr/isteps/istep21/call_host_start_payload.C +++ b/src/usr/isteps/istep21/call_host_start_payload.C @@ -578,7 +578,7 @@ errlHndl_t enableCoreCheckstops() uint64_t l_physAddr = l_pChipTarget->getAttr<TARGETING::ATTR_SLW_IMAGE_ADDR>(); l_slwPtr = mm_block_map(reinterpret_cast<void*>(l_physAddr), - HOMER_MAX_SLW_IMG_SIZE_IN_MB*MEGABYTE); + HOMER_MAX_STOP_IMG_SIZE_IN_MB*MEGABYTE); if( l_slwPtr == NULL ) { TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "Error from mm_block_map : phys=%.16X", l_physAddr ); @@ -587,7 +587,7 @@ errlHndl_t enableCoreCheckstops() * @reasoncode RC_MM_MAP_ERR * @moduleid MOD_ENABLE_CORE_CHECKSTOPS * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE - * @userdata1 <unused> + * @userdata1 Size of STOP IMG * @userdata2 Physical address * @devdesc mm_block_map() returns error * @custdesc A problem occurred during the IPL @@ -596,9 +596,9 @@ errlHndl_t enableCoreCheckstops() l_errl = new ERRORLOG::ErrlEntry( ERRORLOG::ERRL_SEV_UNRECOVERABLE, - MOD_ENABLE_CORE_CHECKSTOPS, - RC_MM_MAP_ERR, - 0, + ISTEP::MOD_ENABLE_CORE_CHECKSTOPS, + ISTEP::RC_MM_MAP_ERR, + HOMER_MAX_STOP_IMG_SIZE_IN_MB*MEGABYTE, l_physAddr); } @@ -680,8 +680,8 @@ errlHndl_t enableCoreCheckstops() TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "Error from mm_block_unmap : rc=%d, ptr=%p", mm_rc, l_slwPtr ); /*@ * @errortype - * @reasoncode RC_MM_UNMAP_ERR - * @moduleid MOD_ENABLE_CORE_CHECKSTOPS + * @reasoncode ISTEP::RC_MM_UNMAP_ERR + * @moduleid ISTEP::MOD_ENABLE_CORE_CHECKSTOPS * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE * @userdata1 Return Code * @userdata2 Unmap address @@ -692,8 +692,8 @@ errlHndl_t enableCoreCheckstops() l_errl = new ERRORLOG::ErrlEntry( ERRORLOG::ERRL_SEV_UNRECOVERABLE, - MOD_ENABLE_CORE_CHECKSTOPS, - RC_MM_UNMAP_ERR, + ISTEP::MOD_ENABLE_CORE_CHECKSTOPS, + ISTEP::RC_MM_UNMAP_ERR, mm_rc, reinterpret_cast<uint64_t> (l_slwPtr)); |