Update MPIPL path for fused mode improvements

In DD1 we always only booted with a single core until istep 16.
In DD2 we can boot in fused mode. There were a couple places where
we were assuming that we were booting with a single core, this commit
addresses those places

Change-Id: Idbcefc4c73c7f7a70d76fe60d3f1080d97634d25
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43618
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>

2 files changed, 181 insertions, 12 deletions

diff --git a/src/usr/isteps/istep06/host_discover_targets.C b/src/usr/isteps/istep06/host_discover_targets.C
index 88b2f4114..364e30b5d 100644
--- a/src/usr/isteps/istep06/host_discover_targets.C
+++ b/src/usr/isteps/istep06/host_discover_targets.C
@@ -286,10 +286,10 @@ errlHndl_t powerDownSlaveQuads()
     TARGETING::TargetHandleList l_eqTargetList;
     getAllChiplets(l_eqTargetList, TARGETING::TYPE_EQ, true);
     uint64_t EX_0_CME_SCOM_SICR_SCOM1 = 0x1001203E;
-    uint64_t CME_SCOM_SICR_PM_EXIT_C0_MASK = 0x0800000000000000;
+    uint64_t CME_SCOM_SICR_PM_EXIT_C0_AND_C1_MASK = 0x0C00000000000000;
     uint64_t CPPM_CORE_POWMAN_MODE_REG = 0x200F0108;
     uint64_t SET_WKUP_SELECT_MASK = 0x0004000000000000;
-    size_t   MASK_SIZE = sizeof(CME_SCOM_SICR_PM_EXIT_C0_MASK);
+    size_t   MASK_SIZE = sizeof(CME_SCOM_SICR_PM_EXIT_C0_AND_C1_MASK);
 
 
 
@@ -338,15 +338,15 @@ errlHndl_t powerDownSlaveQuads()
             //TODO 171763 Core state setup for MPIPL should be done in a HWP
             for(const auto & l_ex_child : l_exChildren)
             {
-                // Clear bit 4 of CME_SCOM_SICR which sets PM_EXIT
+                // Clear bits 4 & 5 of CME_SCOM_SICR which sets PM_EXIT for C0 and C1 respectively
                 l_err = deviceWrite(l_ex_child,
-                                    &CME_SCOM_SICR_PM_EXIT_C0_MASK,
+                                    &CME_SCOM_SICR_PM_EXIT_C0_AND_C1_MASK,
                                     MASK_SIZE,
                                     DEVICE_SCOM_ADDRESS(EX_0_CME_SCOM_SICR_SCOM1)); //0x1001203E
                 if(l_err)
                 {
                     TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
-                              "Error clearing bit 4 of CME_SCOM_SICR on ex %d", l_ex_child->getAttr<TARGETING::ATTR_CHIP_UNIT>());
+                              "Error clearing bits 4 and 5 of CME_SCOM_SICR on ex %d", l_ex_child->getAttr<TARGETING::ATTR_CHIP_UNIT>());
                     break;
                 }
             }
diff --git a/src/usr/isteps/istep16/call_host_activate_master.C b/src/usr/isteps/istep16/call_host_activate_master.C
index 655bc08ad..a061ba96c 100644
--- a/src/usr/isteps/istep16/call_host_activate_master.C
+++ b/src/usr/isteps/istep16/call_host_activate_master.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2016                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -33,6 +33,11 @@
 #include    <intr/interrupt.H>
 #include    <console/consoleif.H>
 
+#include <arch/pirformat.H>
+#include <arch/pvrformat.H>
+#include <sys/task.h>
+#include <sys/mmio.h>
+
 //  targeting support
 #include    <targeting/namedtarget.H>
 #include    <targeting/attrsync.H>
@@ -68,9 +73,15 @@ void* call_host_activate_master (void *io_pArgs)
     errlHndl_t  l_errl  =   NULL;
 
     do  {
+        bool l_isFusedMode = is_fused_mode();
         // find the master core, i.e. the one we are running on
         TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
                    "call_host_activate_master: Find master core: " );
+                   //Determine top-level system target
+        TARGETING::Target* l_sys = NULL;
+        TARGETING::targetService().getTopLevelTarget(l_sys);
+        assert( l_sys != NULL );
+
 
         const TARGETING::Target*  l_masterCore  = getMasterCore( );
         assert( l_masterCore != NULL );
@@ -82,6 +93,76 @@ void* call_host_activate_master (void *io_pArgs)
         const fapi2::Target<fapi2::TARGET_TYPE_CORE> l_fapi2_coreTarget(
                                 const_cast<TARGETING::Target*> (l_masterCore));
 
+        bool l_isDD1 = false;
+        PVR_t l_pvr( mmio_pvr_read() & 0xFFFFFFFF );
+        if( l_pvr.isNimbusDD1() )
+        {
+            l_isDD1 = true;
+        }
+
+        fapi2::Target<fapi2::TARGET_TYPE_CORE> l_fapi2_fusedTarget = NULL;
+        const TARGETING::Target* l_fusedCore = NULL;
+
+        if(l_isFusedMode && !l_isDD1)
+        {
+            uint64_t cpuid = task_getcpuid();
+            uint64_t l_masterCoreID = PIR_t::coreFromPir(cpuid);
+            uint64_t l_fusedCoreID = l_masterCoreID + 1;
+
+            // get the list of core targets for this proc chip
+            TARGETING::TargetHandleList l_coreTargetList;
+            TARGETING::getChildChiplets( l_coreTargetList,
+                                         l_proc_target,
+                                         TARGETING::TYPE_CORE,
+                                         false);
+
+            //Find the core that matched with the fusedCoreID we
+            //calculated above. This core is the core that will
+            //be fused with the master.
+            for( const auto & l_core:l_coreTargetList)
+            {
+                TARGETING::ATTR_CHIP_UNIT_type l_coreId =
+                (l_core)->getAttr<TARGETING::ATTR_CHIP_UNIT>();
+                if( l_coreId == l_fusedCoreID )
+                {
+                    l_fusedCore = (l_core);
+                    break;
+                }
+            }
+
+            if( l_fusedCore == NULL )
+            {
+                TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                        "Could not find a target for core %d",
+                        l_fusedCoreID );
+                /*@
+                * @errortype
+                * @moduleid     ISTEP::MOD_HOST_ACTIVATE_MASTER
+                * @reasoncode   ISTEP::RC_NO_FUSED_CORE_TARGET
+                * @userdata1    Master-fused core id
+                * @userdata2    Master-fused processor chip huid
+                * @devdesc      activate_master> Could not find a target
+                *               for the master-fused core
+                * @custdesc     A problem occurred during the IPL
+                *               of the system.
+                */
+                l_errl = new ERRORLOG::ErrlEntry(
+                                    ERRORLOG::ERRL_SEV_UNRECOVERABLE,
+                                    ISTEP::MOD_HOST_ACTIVATE_MASTER,
+                                    ISTEP::RC_NO_FUSED_CORE_TARGET,
+                                    l_fusedCoreID,
+                                    TARGETING::get_huid(l_proc_target));
+                l_errl->collectTrace("TARG",256);
+                l_errl->collectTrace(FAPI_TRACE_NAME,256);
+                l_errl->collectTrace(FAPI_IMP_TRACE_NAME,256);
+
+                break;
+            }
+
+            // Cast OUR type of target to a FAPI2 type of target.
+            l_fapi2_fusedTarget = const_cast<TARGETING::Target*> (l_fusedCore);
+        }
+
         //Because of a bug in how the SBE injects the IPI used to wake
         //up the master core, need to ensure no mailbox traffic
         //or even an interrupt in the interrupt presenter
@@ -101,9 +182,10 @@ void* call_host_activate_master (void *io_pArgs)
                    "Target HUID %.8X",
                     TARGETING::get_huid(l_proc_target));
 
-        //In the future possibly move default "waitTime" value to SBEIO code
-        uint64_t waitTime = 1000000; // bump the wait time to 1 sec
-        l_errl = SBEIO::startDeadmanLoop(waitTime);
+            //In the future possibly move default "waitTime" value to SBEIO code
+            uint64_t waitTime = 1000000; // bump the wait time to 1 sec
+            l_errl = SBEIO::startDeadmanLoop(waitTime);
+
         if ( l_errl )
         {
             TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
@@ -137,6 +219,7 @@ void* call_host_activate_master (void *io_pArgs)
                    "Target HUID %.8x",
                    TARGETING::get_huid(l_fapi2_coreTarget) );
 
+
         FAPI_INVOKE_HWP( l_errl,
                         p9_block_wakeup_intr,
                         l_fapi2_coreTarget,
@@ -187,6 +270,63 @@ void* call_host_activate_master (void *io_pArgs)
                       "Disable special wakeup on master core SUCCESS");
         }
 
+        if(l_fusedCore != NULL)
+        {
+            TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+            "call_host_activated_master: call p9_block_wakeup_intr(SET) "
+            "Target HUID %.8x",
+            TARGETING::get_huid(l_fapi2_fusedTarget) );
+
+            FAPI_INVOKE_HWP( l_errl,
+                            p9_block_wakeup_intr,
+                             l_fapi2_fusedTarget,
+                            p9pmblockwkup::SET );
+
+            if ( l_errl )
+            {
+                TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                "p9_block_wakeup_intr ERROR : Returning errorlog, reason=0x%x",
+                    l_errl->reasonCode() );
+
+                // capture the target data in the elog
+                ErrlUserDetailsTarget(l_fusedCore).addToLog( l_errl );
+
+                break;
+            }
+            else
+            {
+                TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                        "p9_block_wakeup_intr SUCCESS"  );
+            }
+
+            // Clear special wakeup
+            TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                    "Disable special wakeup on fused core");
+
+            FAPI_INVOKE_HWP(l_errl, p9_cpu_special_wakeup_core,
+                            l_fapi2_fusedTarget,
+                            SPCWKUP_DISABLE,
+                            HOST);
+
+
+            if(l_errl)
+            {
+                TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                "Disable p9_cpu_special_wakeup_core ERROR : Returning errorlog,"
+                " reason=0x%x",
+                    l_errl->reasonCode() );
+
+                // capture the target data in the elog
+                ErrlUserDetailsTarget(l_fusedCore).addToLog( l_errl );
+
+                break;
+            }
+            else
+            {
+                TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+                        "Disable special wakeup on master core SUCCESS");
+            }
+        }
 
         //  put the master into winkle.
         TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
@@ -194,9 +334,8 @@ void* call_host_activate_master (void *io_pArgs)
 
         // Flush any lingering console traces first
         CONSOLE::flush();
-        bool l_fusedCores = is_fused_mode();
 
-        int l_rc    =   cpu_master_winkle(l_fusedCores);
+        int l_rc    =   cpu_master_winkle(l_isFusedMode);
         if ( l_rc )
         {
             TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
@@ -216,7 +355,7 @@ void* call_host_activate_master (void *io_pArgs)
             new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE,
                                     MOD_HOST_ACTIVATE_MASTER,
                                     RC_FAIL_MASTER_WINKLE,
-                                    l_rc, l_fusedCores );
+                                    l_rc, l_isFusedMode );
             break;
         }
 
@@ -289,6 +428,36 @@ void* call_host_activate_master (void *io_pArgs)
                       "Enable special wakeup on master core SUCCESS");
         }
 
+        if(l_fusedCore != NULL)
+        {
+            TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+            "Enable special wakeup on fused core");
+
+
+            FAPI_INVOKE_HWP(l_errl, p9_cpu_special_wakeup_core,
+                            l_fapi2_fusedTarget,
+                            SPCWKUP_ENABLE,
+                            HOST);
+
+            if(l_errl)
+            {
+                TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                "Enable p9_cpu_special_wakeup_core ERROR : Returning errorlog, "
+                "reason=0x%x",
+                    l_errl->reasonCode() );
+
+                // capture the target data in the elog
+                ErrlUserDetailsTarget(l_fusedCore).addToLog( l_errl );
+
+                break;
+            }
+            else
+            {
+                TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+                        "Enable special wakeup on master core SUCCESS");
+            }
+        }
+
     }   while ( 0 );
 
     if( l_errl )