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authorMatt Derksen <mderkse1@us.ibm.com>2019-06-27 15:03:42 -0500
committerDaniel M Crowell <dcrowell@us.ibm.com>2020-01-20 10:23:06 -0600
commit829e56fb1456d699806f8e69ebddf7835c1ae633 (patch)
tree1b92407305312ea3983f817c45866e8d98755ec6 /src/usr/isteps/nvdimm/nvdimm_update.H
parent1cb00f7e0e9c6cd2646d7e0245a5f22ecf97ab0c (diff)
downloadtalos-hostboot-829e56fb1456d699806f8e69ebddf7835c1ae633.tar.gz
talos-hostboot-829e56fb1456d699806f8e69ebddf7835c1ae633.zip
NVDIMM: Use block write for nvdimm update
In an effort to speed up the nvdimm update, full 32-byte blocks can now be sent via I2C SMBUS with no initial byte count byte. Since a block write seems more prone to random system interrupt, this code should be restricted to run on v3.A or beyond which has the timeout increased to mitigate these interrupts. Test results have shown about a 5 minute improvement per NVDIMM. Change-Id: I040a5f2cc5afb76a73129ef9f6ac965cf36775f4 CQ: SW471053 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/79678 Reviewed-by: Corey V Swenson <cswenson@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: TSUNG K YEUNG <tyeung@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/isteps/nvdimm/nvdimm_update.H')
-rw-r--r--src/usr/isteps/nvdimm/nvdimm_update.H15
1 files changed, 14 insertions, 1 deletions
diff --git a/src/usr/isteps/nvdimm/nvdimm_update.H b/src/usr/isteps/nvdimm/nvdimm_update.H
index 1e48f7ef8..3f71dff56 100644
--- a/src/usr/isteps/nvdimm/nvdimm_update.H
+++ b/src/usr/isteps/nvdimm/nvdimm_update.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2018,2019 */
+/* Contributors Listed Below - COPYRIGHT 2018,2020 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -42,6 +42,7 @@ const uint16_t INVALID_ID = 0xFFFF;
const uint16_t INVALID_VERSION = 0xFFFF;
const uint16_t INVALID_TIMEOUT = 0xFFFF;
const uint32_t INVALID_TYPE = 0xFFFFFFFF;
+const uint8_t INVALID_BLOCK_SIZE = 0x00;
// Type is combination of manufacturer id and product id
const uint32_t SMART_NVDIMM_16GB_TYPE = 0x01945377;
@@ -245,6 +246,15 @@ class NvdimmInstalledImage
}
/**
+ * @brief Accessor for what write size is supported for this installed nvdimm
+ * Prior to level 0x3A, only word size supported
+ * Level 0x3A and beyond support 32 byte block writes
+ * @param[out] maximum number of bytes allowed per write
+ * @return block write size supported for this current nvdimm level
+ */
+ errlHndl_t getBlockWriteSizeSupported(uint64_t & o_blockSize);
+
+ /**
* @brief Update the current NV Controller
* @param Update using this image
* @return error pointer if failure to update, else nullptr
@@ -277,6 +287,9 @@ class NvdimmInstalledImage
// retry attempts for all regions
uint8_t iv_region_write_retries;
+ // what size block can be written (2 or 32 byte)
+ uint64_t iv_blockSizeSupported;
+
// Helper functions for updating the installed lid
/**
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