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authorPrachi Gupta <pragupta@us.ibm.com>2015-10-26 11:38:27 -0500
committerPatrick Williams <iawillia@us.ibm.com>2015-12-11 15:30:27 -0600
commitc648ceaa200710e15106bf8acea2094c82ab9458 (patch)
tree83a8c0c0df7019aea4314a2fa7a8cca27418cd25 /src/usr/isteps/istep16
parentbf4cb3342fe0aa8a51d11bb85bddab61a0a7398c (diff)
downloadtalos-hostboot-c648ceaa200710e15106bf8acea2094c82ab9458.tar.gz
talos-hostboot-c648ceaa200710e15106bf8acea2094c82ab9458.zip
P9 Isteps: Created directory structure for istep 15 & 16 wrappers
Change-Id: Id780406de73f04a05ad22ed8c9d8770c581d785e RTC:137652 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21502 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/isteps/istep16')
-rw-r--r--src/usr/isteps/istep16/call_host_activate_master.C341
-rw-r--r--src/usr/isteps/istep16/call_host_activate_slave_cores.C370
-rw-r--r--src/usr/isteps/istep16/call_host_ipl_complete.C321
-rw-r--r--src/usr/isteps/istep16/call_host_secure_rng.C39
-rw-r--r--src/usr/isteps/istep16/call_mss_scrub.C74
-rw-r--r--src/usr/isteps/istep16/makefile36
6 files changed, 1181 insertions, 0 deletions
diff --git a/src/usr/isteps/istep16/call_host_activate_master.C b/src/usr/isteps/istep16/call_host_activate_master.C
new file mode 100644
index 000000000..a08f942f8
--- /dev/null
+++ b/src/usr/isteps/istep16/call_host_activate_master.C
@@ -0,0 +1,341 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/isteps/istep16/call_host_activate_master.C $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+
+#include <errl/errlentry.H>
+#include <stdint.h>
+#include <errno.h>
+#include <config.h>
+#include <initservice/initserviceif.H>
+#include <trace/interface.H>
+#include <initservice/taskargs.H>
+#include <errl/errlentry.H>
+
+#include <initservice/isteps_trace.H>
+#include <initservice/istepdispatcherif.H>
+
+#include <isteps/hwpisteperror.H>
+#include <errl/errludtarget.H>
+
+#include <intr/interrupt.H>
+#include <console/consoleif.H>
+
+// targeting support
+#include <targeting/common/commontargeting.H>
+#include <targeting/common/utilFilter.H>
+#include <targeting/namedtarget.H>
+#include <targeting/attrsync.H>
+#include <runtime/runtime.H>
+
+#include <sys/task.h>
+#include <sys/misc.h>
+
+#include <util/misc.H>
+
+using namespace ERRORLOG;
+using namespace TARGETING;
+using namespace ISTEP;
+using namespace ISTEP_ERROR;
+
+
+namespace ISTEP_16
+{
+ //@TODO RTC:133832 call p9_sbe_trigger_stop15.C HWP
+ //@TODO RTC:133832 call p9_block_wakeup_intr.C HWP
+void* call_host_activate_master (void *io_pArgs)
+{
+ IStepError l_stepError;
+#if 0
+
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "call_host_activate_master entry" );
+
+ errlHndl_t l_errl = NULL;
+
+ // @@@@@ CUSTOM BLOCK: @@@@@
+
+ do {
+
+ // find the master core, i.e. the one we are running on
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "call_host_activate_master: Find master core: " );
+
+ const TARGETING::Target* l_masterCore = getMasterCore( );
+ assert( l_masterCore != NULL );
+
+ TARGETING::Target* l_cpu_target = const_cast<TARGETING::Target *>
+ ( getParentChip( l_masterCore ) );
+
+ //@TODO RTC:133832
+ // Cast OUR type of target to a FAPI type of target.
+ //const fapi::Target l_fapi_cpu_target( TARGET_TYPE_PROC_CHIP,
+ // (const_cast<TARGETING::Target*> (l_cpu_target)) );
+
+ // Pass in Master EX target
+ const TARGETING::Target* l_masterEx = getExChiplet(l_masterCore);
+ assert(l_masterEx != NULL );
+
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "call_host_activate_master: call proc_prep_master_winkle. "
+ "Target HUID %.8X",
+ TARGETING::get_huid(l_masterEx));
+
+ //@TODO RTC:133832
+ // cast OUR type of target to a FAPI type of target.
+ //const fapi::Target l_fapi_ex_target( TARGET_TYPE_EX_CHIPLET,
+ // (const_cast<TARGETING::Target*> (l_masterEx)) );
+
+ // call the HWP with each fapi::Target
+ //FAPI_INVOKE_HWP( l_errl,
+ // proc_prep_master_winkle,
+ // l_fapi_ex_target,
+ // true );
+ if ( l_errl )
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "proc_prep_master_winkle ERROR : Returning errorlog, reason=0x%x",
+ l_errl->reasonCode() );
+
+ // capture the target data in the elog
+ ErrlUserDetailsTarget(l_masterEx).addToLog( l_errl );
+
+ break;
+ }
+ else
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "proc_prep_master_winkle SUCCESS" );
+ }
+
+ //Because of a bug in how the SBE injects the IPI used to wake
+ //up the master core, need to ensure no mailbox traffic
+ //or even an interrupt in the interrupt presenter
+ // 1) suspend the mailbox with interrupt disable
+ // 2) ensure that interrupt presenter is drained
+ l_errl = MBOX::suspend(true, true);
+ if (l_errl)
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "call_host_activate_master ERROR : MBOX::suspend");
+ break;
+ }
+
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "draining interrupt Q");
+ INTR::drainQueue();
+
+
+ // Call p8_block_wakeup_intr to prevent stray interrupts from
+ // popping core out of winkle before SBE sees it.
+
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "call_host_activated_master: call p8_block_wakeup_intr(SET) "
+ "Target HUID %.8x",
+ TARGETING::get_huid(l_masterEx) );
+
+ //@TODO RTC:133832
+ //FAPI_INVOKE_HWP( l_errl,
+ // p8_block_wakeup_intr,
+ // l_fapi_ex_target,
+ // BLKWKUP_SET );
+
+ if ( l_errl )
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "p8_block_wakeup_intr ERROR : Returning errorlog, reason=0x%x",
+ l_errl->reasonCode() );
+
+ // capture the target data in the elog
+ ErrlUserDetailsTarget(l_masterEx).addToLog( l_errl );
+
+ break;
+ }
+ else
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "p8_block_wakeup_intr SUCCESS" );
+ }
+
+ // Clear special wakeup
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Disable special wakeup on master core");
+
+ //@TODO RTC:133832
+ /*
+ FAPI_INVOKE_HWP(l_errl, p8_cpu_special_wakeup,
+ l_fapi_ex_target,
+ SPCWKUP_DISABLE,
+ HOST);
+ */
+
+ if(l_errl)
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Disable p8_cpu_special_wakeup ERROR : Returning errorlog,"
+ " reason=0x%x",
+ l_errl->reasonCode() );
+
+ // capture the target data in the elog
+ ErrlUserDetailsTarget(l_masterEx).addToLog( l_errl );
+
+ break;
+ }
+ else
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "Disable special wakeup on master core SUCCESS");
+ }
+
+
+ // put the master into winkle.
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "call_host_activate_master: put master into winkle..." );
+
+ // Flush any lingering console traces first
+ CONSOLE::flush();
+
+ int l_rc = cpu_master_winkle( );
+ if ( l_rc )
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR : failed to winkle master, rc=0x%x",
+ l_rc );
+ /*@
+ * @errortype
+ * @reasoncode ISTEP_FAIL_MASTER_WINKLE_RC
+ * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE
+ * @moduleid ISTEP_HOST_ACTIVATE_MASTER
+ * @userdata1 return code from cpu_master_winkle
+ *
+ * @devdesc p8_pore_gen_cpureg returned an error when
+ * attempting to change a reg value in the PORE image.
+ */
+ l_errl =
+ new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE,
+ ISTEP_HOST_ACTIVATE_MASTER,
+ ISTEP_FAIL_MASTER_WINKLE_RC,
+ l_rc );
+ break;
+ }
+
+
+ // --------------------------------------------------------
+ // should return from Winkle at this point
+ // --------------------------------------------------------
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Returned from Winkle." );
+
+ //Re-enable the mailbox
+ l_errl = MBOX::resume();
+ if (l_errl)
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "call_host_activate_master ERROR : MBOX::resume");
+ break;
+ }
+
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Call proc_stop_deadman_timer. Target %.8X",
+ TARGETING::get_huid(l_cpu_target) );
+
+ // call the HWP with each fapi::Target
+ bool l_sbeIntrServiceActive = false;
+ //@TODO RTC:133832
+/* FAPI_INVOKE_HWP( l_errl,
+ proc_stop_deadman_timer,
+ l_fapi_cpu_target,
+ l_sbeIntrServiceActive );
+*/
+ if ( l_errl )
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "proc_stop_deadman_timer ERROR : "
+ "Returning errorlog, reason=0x%x",
+ l_errl->reasonCode() );
+
+ // capture the target data in the elog
+ ErrlUserDetailsTarget(l_cpu_target).addToLog( l_errl );
+
+ break;
+ }
+ else
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "proc_prep_master_winkle SUCCESS" );
+ }
+ TARGETING::Target* sys = NULL;
+ TARGETING::targetService().getTopLevelTarget(sys);
+ sys->setAttr<ATTR_SBE_MASTER_INTR_SERVICE_ENABLED>
+ (l_sbeIntrServiceActive);
+
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Enable special wakeup on master core");
+
+ //@TODO RTC:133832
+ /*
+ FAPI_INVOKE_HWP(l_errl, p8_cpu_special_wakeup,
+ l_fapi_ex_target,
+ SPCWKUP_ENABLE,
+ HOST);
+*/
+ if(l_errl)
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Enable p8_cpu_special_wakeup ERROR : Returning errorlog, "
+ "reason=0x%x",
+ l_errl->reasonCode() );
+
+ // capture the target data in the elog
+ ErrlUserDetailsTarget(l_masterEx).addToLog( l_errl );
+
+ break;
+ }
+ else
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "Enable special wakeup on master core SUCCESS");
+ }
+
+ } while ( 0 );
+
+ // @@@@@ END CUSTOM BLOCK: @@@@@
+ if( l_errl )
+ {
+ // Create IStep error log and cross reference error that occurred
+ l_stepError.addErrorDetails( l_errl );
+
+ // Commit Error
+ errlCommit( l_errl, HWPF_COMP_ID );
+ }
+
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "call_host_activate_master exit" );
+#endif
+ // end task, returning any errorlogs to IStepDisp
+ return l_stepError.getErrorHandle();
+
+}
+
+
+
+};
diff --git a/src/usr/isteps/istep16/call_host_activate_slave_cores.C b/src/usr/isteps/istep16/call_host_activate_slave_cores.C
new file mode 100644
index 000000000..88e8f025e
--- /dev/null
+++ b/src/usr/isteps/istep16/call_host_activate_slave_cores.C
@@ -0,0 +1,370 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/isteps/istep16/call_host_activate_slave_cores.C $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+
+#include <errl/errlentry.H>
+#include <stdint.h>
+#include <errno.h>
+#include <config.h>
+#include <initservice/initserviceif.H>
+#include <trace/interface.H>
+#include <initservice/taskargs.H>
+#include <errl/errlentry.H>
+
+#include <initservice/isteps_trace.H>
+#include <initservice/istepdispatcherif.H>
+
+#include <isteps/hwpisteperror.H>
+#include <errl/errludtarget.H>
+
+#include <intr/interrupt.H>
+#include <console/consoleif.H>
+
+// targeting support
+#include <targeting/common/commontargeting.H>
+#include <targeting/common/utilFilter.H>
+#include <targeting/namedtarget.H>
+#include <targeting/attrsync.H>
+#include <runtime/runtime.H>
+
+#include <sys/task.h>
+#include <sys/misc.h>
+
+#include <util/misc.H>
+
+using namespace ERRORLOG;
+using namespace TARGETING;
+using namespace ISTEP;
+using namespace ISTEP_ERROR;
+
+
+namespace ISTEP_16
+{
+void* call_host_activate_slave_cores (void *io_pArgs)
+{
+ IStepError l_stepError;
+#if 0
+ errlHndl_t l_timeout_errl = NULL;
+ errlHndl_t l_errl = NULL;
+
+
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "call_host_activate_slave_cores entry" );
+
+ // @@@@@ CUSTOM BLOCK: @@@@@
+
+ uint64_t l_masterCoreID = task_getcpuid() & ~7;
+
+ TargetHandleList l_cores;
+ getAllChiplets(l_cores, TYPE_CORE);
+
+ for(TargetHandleList::const_iterator
+ l_core = l_cores.begin();
+ l_core != l_cores.end();
+ ++l_core)
+ {
+ ConstTargetHandle_t l_processor = getParentChip(*l_core);
+
+ CHIP_UNIT_ATTR l_coreId =
+ (*l_core)->getAttr<TARGETING::ATTR_CHIP_UNIT>();
+ FABRIC_NODE_ID_ATTR l_logicalNodeId =
+ l_processor->getAttr<TARGETING::ATTR_FABRIC_NODE_ID>();
+ FABRIC_CHIP_ID_ATTR l_chipId =
+ l_processor->getAttr<TARGETING::ATTR_FABRIC_CHIP_ID>();
+ TARGETING::Target* sys = NULL;
+ TARGETING::targetService().getTopLevelTarget(sys);
+ assert( sys != NULL );
+ uint64_t en_threads = sys->getAttr<ATTR_ENABLED_THREADS>();
+
+ uint64_t pir = INTR::PIR_t(l_logicalNodeId, l_chipId, l_coreId).word;
+
+ if (pir != l_masterCoreID)
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "call_host_activate_slave_cores: Waking %x",
+ pir );
+
+ // Get EX FAPI target
+ TARGETING::TargetHandleList targetList;
+ getParentAffinityTargets(targetList,
+ (*l_core),
+ TARGETING::CLASS_UNIT,
+ TARGETING::TYPE_EX);
+
+
+ // verify the list has one entry, see SW272212.
+ if( targetList.size() == 1 )
+ {
+ TARGETING::Target* l_ex = targetList[0];
+ //@TODO RTC:133832
+ //const fapi::Target l_fapi_ex_target( TARGET_TYPE_EX_CHIPLET,
+ // const_cast<TARGETING::Target*>(l_ex) );
+
+ int rc = cpu_start_core(pir,en_threads);
+
+ // Handle time out error
+ if (-ETIME == rc)
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "call_host_activate_slave_cores: "
+ "Time out rc from kernel %d on core %x",
+ rc,
+ pir);
+
+ //@TODO RTC:133832
+ //FAPI_INVOKE_HWP( l_timeout_errl, proc_check_slw_done,
+ //l_fapi_ex_target);
+ if (l_timeout_errl)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR : proc_check_slw_done" );
+ // Add chip target info
+ ErrlUserDetailsTarget(l_processor).addToLog(
+ l_timeout_errl );
+ // Create IStep error log
+ l_stepError.addErrorDetails(l_timeout_errl);
+ // Commit error
+ errlCommit( l_timeout_errl, HWPF_COMP_ID );
+ break;
+ }
+ else
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS : proc_check_slw_done - "
+ "SLW is in clean state");
+ }
+ }
+ // Create error log
+ if (0 != rc)
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "call_host_activate_slave_cores: "
+ "Error from kernel %d on core %x",
+ rc,
+ pir);
+ /*@
+ * @errortype
+ * @reasoncode ISTEP_BAD_RC
+ * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE
+ * @moduleid ISTEP_HOST_ACTIVATE_SLAVE_CORES
+ * @userdata1 PIR of failing core.
+ * @userdata2 rc of cpu_start_core().
+ *
+ * @devdesc Kernel returned error when trying to activate
+ * core.
+ */
+ errlHndl_t l_errl =
+ new ERRORLOG::ErrlEntry(
+ ERRORLOG::ERRL_SEV_UNRECOVERABLE,
+ ISTEP_HOST_ACTIVATE_SLAVE_CORES,
+ ISTEP_BAD_RC,
+ pir,
+ rc );
+
+ // Callout core that failed to wake up.
+ l_errl->addHwCallout(*l_core,
+ HWAS::SRCI_PRIORITY_MED,
+ HWAS::DECONFIG,
+ HWAS::GARD_Predictive);
+
+ l_stepError.addErrorDetails( l_errl );
+ errlCommit( l_errl, HWPF_COMP_ID );
+ break;
+ }
+ else //Core out of winkle sucessfully, issue SPWU for PRD
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "Running p8_cpu_special_wakeup (ENABLE)"
+ " EX target HUID %.8X",
+ TARGETING::get_huid(l_ex));
+
+ // Enable special wakeup on core
+ //@TODO RTC:133832
+ /*FAPI_INVOKE_HWP( l_errl,
+ p8_cpu_special_wakeup,
+ l_fapi_ex_target,
+ SPCWKUP_ENABLE,
+ HOST);
+ */
+ if( l_errl )
+ {
+ ErrlUserDetailsTarget(l_ex).addToLog( l_errl );
+
+ // Create IStep error log and cross ref error that
+ // occurred
+ l_stepError.addErrorDetails( l_errl );
+
+ // Commit Error
+ errlCommit( l_errl, HWPF_COMP_ID );
+
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR : enable p8_cpu_special_wakeup, "
+ "PLID=0x%x", l_errl->plid() );
+ }
+ else
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS: enable p8_cpu_special_wakeup");
+ }
+ }
+ }
+ else
+ {
+ // wrong number of targets in the list, create an error log
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR: call to getParentAffinityTarget "
+ "returned %d instead of 1", targetList.size() );
+ /*@
+ * @errortype
+ * @reasoncode ISTEP_INCORRECT_TARGET_COUNT
+ * @severity ERRORLOG::ERRL_SEV_UNRECOVERABLE
+ * @moduleid ISTEP_HOST_ACTIVATE_SLAVE_CORES
+ * @userdata1 PIR of failing core.
+ * @userdata2 number of targets returned
+ *
+ * @devdesc Call to getParentAffinityTarget requesting
+ * the number of EX chips with parent affinity
+ * to a core, returned an incorrect vector size,
+ * the expected size is 1.
+ *
+ * @custdec A problem occurred during the IPL of the system.
+ *
+ */
+ l_errl =
+ new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE,
+ ISTEP_HOST_ACTIVATE_SLAVE_CORES,
+ ISTEP_INCORRECT_TARGET_COUNT,
+ pir,
+ targetList.size(), true);
+ // Create IStep error log and cross ref error that occurred
+ l_stepError.addErrorDetails( l_errl );
+
+ // Commit Error
+ errlCommit( l_errl, HWPF_COMP_ID );
+ }
+ }
+ }
+
+ if( l_stepError.isNull() )
+ {
+ // Call proc_post_winkle
+ TARGETING::TargetHandleList l_procTargetList;
+ getAllChips(l_procTargetList, TYPE_PROC);
+
+ // Done activate all master/slave cores.
+ // Run post winkle check on all EX targets, one proc at a time.
+ for (TargetHandleList::const_iterator l_procIter =
+ l_procTargetList.begin();
+ l_procIter != l_procTargetList.end();
+ ++l_procIter)
+ {
+ const TARGETING::Target* l_pChipTarget = *l_procIter;
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "Running proc_post_winkle on chip HUID %.8X",
+ TARGETING::get_huid(l_pChipTarget));
+
+ // Get EX list under this proc
+ TARGETING::TargetHandleList l_exList;
+ getChildChiplets( l_exList, l_pChipTarget, TYPE_EX );
+
+ for (TargetHandleList::const_iterator
+ l_exIter = l_exList.begin();
+ l_exIter != l_exList.end();
+ ++l_exIter)
+ {
+ const TARGETING::Target * l_exTarget = *l_exIter;
+
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "Running proc_post_winkle on EX target HUID %.8X",
+ TARGETING::get_huid(l_exTarget));
+
+ // cast OUR type of target to a FAPI type of target.
+ //@TODO RTC:133832
+ /*
+ fapi::Target l_fapi_ex_target( TARGET_TYPE_EX_CHIPLET,
+ (const_cast<TARGETING::Target*>(l_exTarget)) );
+
+ // call the HWP with each fapi::Target
+ FAPI_INVOKE_HWP( l_errl,
+ proc_post_winkle,
+ l_fapi_ex_target);
+ */
+ if ( l_errl )
+ {
+ // capture the target data in the elog
+ ErrlUserDetailsTarget(l_pChipTarget).addToLog( l_errl );
+
+ // Create IStep error log and cross ref error that occurred
+ l_stepError.addErrorDetails( l_errl );
+
+ // Commit Error
+ errlCommit( l_errl, HWPF_COMP_ID );
+
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR : proc_post_winkle, PLID=0x%x",
+ l_errl->plid() );
+ }
+ else
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS : proc_post_winkle" );
+ }
+ }
+
+ } // end for
+
+ } // end if
+
+ // @@@@@ END CUSTOM BLOCK: @@@@@
+
+#ifdef CONFIG_ENABLE_CHECKSTOP_ANALYSIS
+ if( l_stepError.isNull() )
+ {
+ // update firdata inputs for OCC
+ TARGETING::Target* masterproc = NULL;
+ TARGETING::targetService().masterProcChipTargetHandle(masterproc);
+ l_errl = HBOCC::loadHostDataToSRAM(masterproc,
+ PRDF::ALL_HARDWARE);
+ if (l_errl)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "Error returned from call to HBOCC::loadHostDataToSRAM");
+
+ //Create IStep error log and cross reference error that occurred
+ l_stepError.addErrorDetails(l_errl);
+
+ // Commit Error
+ errlCommit(l_errl, HWPF_COMP_ID);
+ }
+ }
+#endif
+
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "call_host_activate_slave_cores exit" );
+#endif
+ // end task, returning any errorlogs to IStepDisp
+ return l_stepError.getErrorHandle();
+}
+
+};
diff --git a/src/usr/isteps/istep16/call_host_ipl_complete.C b/src/usr/isteps/istep16/call_host_ipl_complete.C
new file mode 100644
index 000000000..232027a1f
--- /dev/null
+++ b/src/usr/isteps/istep16/call_host_ipl_complete.C
@@ -0,0 +1,321 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/isteps/istep16/call_host_ipl_complete.C $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+
+#include <errl/errlentry.H>
+#include <initservice/isteps_trace.H>
+#include <isteps/hwpisteperror.H>
+#include <errl/errludtarget.H>
+#include <errl/errlmanager.H>
+
+#include <initservice/initserviceif.H>
+#include <initservice/istepdispatcherif.H>
+
+// targeting support
+#include <targeting/common/commontargeting.H>
+#include <targeting/common/utilFilter.H>
+#include <targeting/namedtarget.H>
+
+
+using namespace ERRORLOG;
+using namespace TARGETING;
+using namespace ISTEP;
+using namespace ISTEP_ERROR;
+
+
+namespace ISTEP_16
+{
+void* call_host_ipl_complete (void *io_pArgs)
+{
+ errlHndl_t l_err = NULL;
+
+ IStepError l_stepError;
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "call_host_ipl_complete entry" );
+ do
+ {
+#if 0
+ // We only need to run cfsim on the master Processor.
+ TARGETING::Target * l_masterProc = NULL;
+ (void)TARGETING::targetService().
+ masterProcChipTargetHandle( l_masterProc );
+
+ //@TODO RTC:133832
+ //const fapi::Target l_fapi_proc_target( TARGET_TYPE_PROC_CHIP,
+ // ( const_cast<TARGETING::Target*>(l_masterProc) ) );
+
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "Running proc_switch_cfsim HWP on target HUID %.8X",
+ TARGETING::get_huid(l_masterProc) );
+
+
+ // call proc_switch_cfsim
+ // TODO: RTC 64136 - Comment out to work around Centaur FSI scom issue
+ // during BU
+ // RTC 64136 is opened to undo this when in-band scoms are available.
+#if 0
+ FAPI_INVOKE_HWP(l_err, proc_switch_cfsim, l_fapi_proc_target,
+ true, // RESET
+ true, // RESET_OPB_SWITCH
+ true, // FENCE_FSI0
+ true, // FENCE_PIB_NH
+ true, // FENCE_PIB_H
+ true, // FENCE_FSI1
+ true); // FENCE_PIB_SW1
+#endif
+ if (l_err)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X: proc_switch_cfsim HWP returned error",
+ l_err->reasonCode());
+
+ // capture the target data in the elog
+ ErrlUserDetailsTarget(l_masterProc).addToLog( l_err );
+
+ // Create IStep error log and cross reference error that occurred
+ l_stepError.addErrorDetails( l_err );
+
+ // commit errorlog
+ errlCommit( l_err, HWPF_COMP_ID );
+
+ //break to end because if proc_switch_cfsim fails
+ //then FSP does not have FSI control again and system is toast
+ break;
+ }
+ else
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS: proc_switch_cfsim HWP( )" );
+ }
+
+
+ if ( INITSERVICE::spBaseServicesEnabled())
+ {
+ // For FSP based systems, do not route centaur
+ // attentions through host after this step.
+ // Loop through all the centaurs in the system
+ // and run cen_switch_rec_attn
+ TARGETING::TargetHandleList l_memTargetList;
+ getAllChips(l_memTargetList, TYPE_MEMBUF );
+
+ for ( TargetHandleList::iterator l_iter = l_memTargetList.begin();
+ l_iter != l_memTargetList.end();
+ ++l_iter )
+ {
+ TARGETING::Target * l_memChip = (*l_iter) ;
+
+ // dump physical path to target
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Running cen_switch_rec_attn HWP on target HUID %.8X",
+ TARGETING::get_huid(l_memChip) );
+
+ // @TODO RTC:133832 cast OUR type of target
+ // to a FAPI type of target.
+ /*
+ fapi::Target l_fapi_centaur_target( TARGET_TYPE_MEMBUF_CHIP,
+ l_memChip );
+ FAPI_INVOKE_HWP( l_err,
+ cen_switch_rec_attn,
+ l_fapi_centaur_target );
+ */
+ if (l_err)
+ {
+ // log error for this centaur and continue
+
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X: cen_switch_rec_attn HWP( )",
+ l_err->reasonCode() );
+
+ // Add all the details for this centaur
+ ErrlUserDetailsTarget myDetails(l_memChip);
+
+ // capture the target data in the elog
+ myDetails.addToLog(l_err);
+
+ // Create IStep error log and cross ref error that occurred
+ l_stepError.addErrorDetails( l_err );
+
+ // Commit Error
+ errlCommit( l_err, HWPF_COMP_ID );
+ }
+ else
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS: cen_switch_rec_attn HWP( )" );
+ }
+ } // endfor
+
+
+ // Loop through all the mcs in the system
+ // and run proc_switch_rec_attn
+ TARGETING::TargetHandleList l_mcsTargetList;
+ getAllChiplets(l_mcsTargetList, TYPE_MCS);
+
+ for ( TargetHandleList::iterator l_iter = l_mcsTargetList.begin();
+ l_iter != l_mcsTargetList.end();
+ ++l_iter )
+ {
+ TARGETING::Target * l_mcsChiplet = (*l_iter) ;
+
+ // dump physical path to target
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Running cen_switch_rec_attn HWP on target HUID %.8X",
+ TARGETING::get_huid(l_mcsChiplet) );
+
+ //@TODO RTC:133832 cast OUR type of target
+ //to a FAPI type of target.
+ /*fapi::Target l_fapi_mcs_target( TARGET_TYPE_MCS_CHIPLET,
+ l_mcsChiplet );
+
+ FAPI_INVOKE_HWP( l_err,
+ proc_switch_rec_attn,
+ l_fapi_mcs_target );
+ */
+ if (l_err)
+ {
+ // log error for this mcs and continue
+
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X: proc_switch_rec_attn HWP( )",
+ l_err->reasonCode() );
+
+ // Add all the details for this proc
+ ErrlUserDetailsTarget myDetails(l_mcsChiplet);
+
+ // capture the target data in the elog
+ myDetails.addToLog(l_err);
+
+ // Create IStep error log and cross ref error that occurred
+ l_stepError.addErrorDetails( l_err );
+
+ // Commit Error
+ errlCommit( l_err, HWPF_COMP_ID );
+ }
+ else
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS: proc_switch_rec_attn HWP( )" );
+ }
+
+ } // endfor
+ } // end if ( INITSERVICE::spBaseServicesEnabled())
+
+#ifdef CONFIG_PCIE_HOTPLUG_CONTROLLER
+ // Loop through all the procs in the system
+ // and run proc_pcie_slot_power to power on the hot plug controller
+ // for Sapphire systems. PowerVM will turn on the hot plug
+ // controller.
+ if (is_sapphire_load())
+ {
+
+ // get a list of all the procs in the system
+ TARGETING::Target* l_pMasterProcTarget = NULL;
+ TARGETING::targetService().
+ masterProcChipTargetHandle(l_pMasterProcTarget);
+ TARGETING::TargetHandleList l_procTargetList;
+ getAllChips(l_procTargetList, TYPE_PROC);
+
+ for (TargetHandleList::const_iterator
+ l_proc_iter = l_procTargetList.begin();
+ l_proc_iter != l_procTargetList.end();
+ ++l_proc_iter)
+ {
+ // make a local copy of the Processor target
+ TARGETING::Target* l_pProcTarget = *l_proc_iter;
+
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "target HUID %.8X",
+ TARGETING::get_huid(l_pProcTarget));
+
+ //@TODO RTC:133832
+ /*
+ fapi::Target l_fapiProcTarget( fapi::TARGET_TYPE_PROC_CHIP,
+ l_pProcTarget );
+
+ // Invoke the HWP
+ FAPI_INVOKE_HWP(l_err,
+ proc_pcie_slot_power,
+ l_fapiProcTarget,
+ true ); // turn on
+ */
+ if (l_err)
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR : proc_pcie_hotplug_control",
+ " failed, returning errorlog" );
+
+ // capture the target data in the elog
+ ErrlUserDetailsTarget(l_pProcTarget).addToLog( l_err );
+
+ // informational. Don't add to istep error or return error
+ l_err->setSev(ERRORLOG::ERRL_SEV_INFORMATIONAL);
+
+ // Commit error log
+ errlCommit( l_err, HWPF_COMP_ID );
+ }
+ else
+ {
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS : proc_pcie_hotplug_control",
+ " completed ok");
+ }
+ } // endfor
+ }
+#endif
+#endif
+ // Sync attributes to Fsp
+ l_err = syncAllAttributesToFsp();
+
+ if( l_err )
+ {
+ break;
+ }
+
+ // Send Sync Point to Fsp
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ INFO_MRK"Send SYNC_POINT_REACHED msg to Fsp" );
+ l_err = INITSERVICE::sendSyncPoint();
+
+ } while( 0 );
+
+ if( l_err )
+ {
+ // collect and log any remaining errors
+
+ // Create IStep error log and cross reference error that occurred
+ l_stepError.addErrorDetails( l_err );
+
+ // Commit Error
+ errlCommit( l_err, HWPF_COMP_ID );
+ }
+
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "call_host_ipl_complete exit ");
+
+ // end task, returning any errorlogs to IStepDisp
+ return l_stepError.getErrorHandle();
+}
+
+
+};
diff --git a/src/usr/isteps/istep16/call_host_secure_rng.C b/src/usr/isteps/istep16/call_host_secure_rng.C
new file mode 100644
index 000000000..04ac58313
--- /dev/null
+++ b/src/usr/isteps/istep16/call_host_secure_rng.C
@@ -0,0 +1,39 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/isteps/istep16/call_host_secure_rng.C $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+
+#include <errl/errlentry.H>
+
+using namespace ERRORLOG;
+
+namespace ISTEP_16
+{
+void* call_host_secure_rng (void *io_pArgs)
+{
+ errlHndl_t l_err = NULL;
+ //@TODO RTC:133832 call p9_secure_rng.C HWP
+ return l_err;
+}
+
+};
diff --git a/src/usr/isteps/istep16/call_mss_scrub.C b/src/usr/isteps/istep16/call_mss_scrub.C
new file mode 100644
index 000000000..51dd2d718
--- /dev/null
+++ b/src/usr/isteps/istep16/call_mss_scrub.C
@@ -0,0 +1,74 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/isteps/istep16/call_mss_scrub.C $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+
+#include <errl/errlentry.H>
+#include <initservice/isteps_trace.H>
+#include <isteps/hwpisteperror.H>
+#include <errl/errludtarget.H>
+#include <errl/errlmanager.H>
+#include <util/misc.H>
+#include <diag/prdf/prdfMain.H>
+
+
+using namespace ERRORLOG;
+using namespace TARGETING;
+using namespace ISTEP;
+using namespace ISTEP_ERROR;
+
+
+namespace ISTEP_16
+{
+void* call_mss_scrub (void *io_pArgs)
+{
+ IStepError l_stepError;
+#if 0
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_scrub entry" );
+
+ // There are performance issues and some functional deficiencies
+ // that make runtime scrub problematic, so turning it off
+ if( Util::isSimicsRunning() )
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "Skipping runtime scrub in Simics" );
+ return NULL;
+ }
+
+ errlHndl_t l_errl = PRDF::startScrub();
+ if ( NULL != l_errl )
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "Error returned from call to PRDF::startScrub" );
+
+ l_stepError.addErrorDetails( l_errl );
+
+ errlCommit( l_errl, HWPF_COMP_ID );
+ }
+
+ TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_scrub exit" );
+#endif
+ // end task, returning any errorlogs to IStepDisp
+ return l_stepError.getErrorHandle();
+}
+
+};
diff --git a/src/usr/isteps/istep16/makefile b/src/usr/isteps/istep16/makefile
new file mode 100644
index 000000000..2d70d9be8
--- /dev/null
+++ b/src/usr/isteps/istep16/makefile
@@ -0,0 +1,36 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: src/usr/isteps/istep16/makefile $
+#
+# OpenPOWER HostBoot Project
+#
+# Contributors Listed Below - COPYRIGHT 2015
+# [+] International Business Machines Corp.
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
+ROOTPATH = ../../../..
+MODULE = istep16
+
+OBJS += call_host_activate_master.o
+OBJS += call_host_activate_slave_cores.o
+OBJS += call_host_secure_rng.o
+OBJS += call_mss_scrub.o
+OBJS += call_host_ipl_complete.o
+
+EXTRAINCDIR += ${ROOTPATH}/src/include/usr/ecmddatabuffer/
+
+include ${ROOTPATH}/config.mk
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