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authorChristian Geddes <crgeddes@us.ibm.com>2019-02-25 11:50:37 -0600
committerDaniel M. Crowell <dcrowell@us.ibm.com>2019-03-08 10:15:55 -0600
commit250291d093401f4ced40f456d10b58e82b7c2cc4 (patch)
tree6be1b2c6a1aabee875000c1d730e7c61c37ee04e /src/usr/isteps/istep12
parent09a3da7596822d721dee3e69a13adfdd67759588 (diff)
downloadtalos-hostboot-250291d093401f4ced40f456d10b58e82b7c2cc4.tar.gz
talos-hostboot-250291d093401f4ced40f456d10b58e82b7c2cc4.zip
Add p9a_omi_training_check hwp call to istep 12.9
For the Axone IPL flow we need to check that omi training has completed. We do during the establisted istep 12.9 which we have set aside for post-memory interface training steps. Change-Id: Ibf43b1b69977ace1e3ca7e9e2c96167958a86e04 RTC: 195554 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72440 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/isteps/istep12')
-rw-r--r--src/usr/isteps/istep12/call_dmi_post_trainadv.C40
-rw-r--r--src/usr/isteps/istep12/makefile5
2 files changed, 43 insertions, 2 deletions
diff --git a/src/usr/isteps/istep12/call_dmi_post_trainadv.C b/src/usr/isteps/istep12/call_dmi_post_trainadv.C
index d99278b20..e5fc8b564 100644
--- a/src/usr/isteps/istep12/call_dmi_post_trainadv.C
+++ b/src/usr/isteps/istep12/call_dmi_post_trainadv.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2017 */
+/* Contributors Listed Below - COPYRIGHT 2015,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -45,6 +45,7 @@
//HWP
#include <p9_io_dmi_post_trainadv.H>
+#include <p9a_omi_train_check.H>
using namespace ISTEP;
using namespace ISTEP_ERROR;
@@ -124,6 +125,43 @@ void* call_dmi_post_trainadv (void *io_pArgs)
}
+ // Find omi targets
+ TARGETING::TargetHandleList l_omiTargetList;
+ getAllChiplets(l_omiTargetList, TYPE_OMI);
+
+ TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "call_dmi_post_trainadv: %d OMIs found",
+ l_omiTargetList.size());
+
+ for (const auto & l_omi_target : l_omiTargetList)
+ {
+ // call the HWP with each OMI target
+ fapi2::Target<fapi2::TARGET_TYPE_OMI> l_fapi_omi_target(l_omi_target);
+
+ FAPI_INVOKE_HWP(l_err, p9a_omi_train_check, l_fapi_omi_target );
+
+ // process return code.
+ if ( l_err )
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X: p9a_omi_train_check HWP on target HUID %.8x",
+ l_err->reasonCode(), TARGETING::get_huid(l_omi_target) );
+
+ // capture the target data in the elog
+ ErrlUserDetailsTarget(l_omi_target).addToLog( l_err );
+
+ // Create IStep error log and cross reference to error that occurred
+ l_StepError.addErrorDetails( l_err );
+
+ // Commit Error
+ errlCommit( l_err, ISTEP_COMP_ID );
+ }
+ else
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS : p9a_omi_train_check HWP on target HUID %.08x",
+ TARGETING::get_huid(l_omi_target));
+ }
+ }
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_dmi_post_trainadv exit" );
diff --git a/src/usr/isteps/istep12/makefile b/src/usr/isteps/istep12/makefile
index eda408e0b..8e0b37368 100644
--- a/src/usr/isteps/istep12/makefile
+++ b/src/usr/isteps/istep12/makefile
@@ -94,7 +94,7 @@ OBJS+=p9c_set_inband_addr.o
OBJS+=p9c_mss_unmask_errors.o
# HWP files we do not have .mks for
-OBJS+=p9a_omi_train.o
+
OBJS+=exp_omi_utils.o
#Required before all the <procedure>.mk are included
@@ -121,5 +121,8 @@ include $(CENT_INITFILE_PATH)/centaur_dmi_scom.mk
include $(P9_IO_HWP_PATH)/p9_io_erepairAccessorHwpFuncs.mk
include ${EXPLORER_HWP_PATH}/exp_omi_setup.mk
include ${EXPLORER_HWP_PATH}/exp_omi_train.mk
+include ${P9A_MSS_HWP_PATH}/p9a_omi_train.mk
+include ${P9A_MSS_HWP_PATH}/p9a_omi_train_check.mk
+
include ${ROOTPATH}/config.mk
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