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| author | Matt Derksen <v2cibmd@us.ibm.com> | 2016-04-26 16:07:38 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-05-04 11:39:47 -0400 |
| commit | 21beca702140bf104b6cb769564ea7f3d105f2b5 (patch) | |
| tree | 34940dad991609b9c38a897a64f58500bcf346e9 /src/usr/isteps/istep10 | |
| parent | 403b95d5ad7c962e815954f2b5e6d4a084299be6 (diff) | |
| download | talos-hostboot-21beca702140bf104b6cb769564ea7f3d105f2b5.tar.gz talos-hostboot-21beca702140bf104b6cb769564ea7f3d105f2b5.zip | |
Use SBE for scoms to slave chips
Change-Id: I31a33c62ae502d8045882a1a4df5bcaf9f2f34ac
RTC:132655
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23785
Tested-by: Jenkins Server
Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com>
Tested-by: FSP CI Jenkins
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/isteps/istep10')
| -rw-r--r-- | src/usr/isteps/istep10/call_proc_build_smp.C | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/usr/isteps/istep10/call_proc_build_smp.C b/src/usr/isteps/istep10/call_proc_build_smp.C index 0d3cf18b2..374ddb6d2 100644 --- a/src/usr/isteps/istep10/call_proc_build_smp.C +++ b/src/usr/isteps/istep10/call_proc_build_smp.C @@ -228,7 +228,7 @@ void* call_proc_build_smp (void *io_pArgs) } // At the point where we can now change the proc chips to use - // XSCOM rather than FSISCOM which is the default. + // XSCOM rather than SBESCOM which is the default. TARGETING::TargetHandleList procChips; getAllChips(procChips, TYPE_PROC); @@ -248,16 +248,16 @@ void* call_proc_build_smp (void *io_pArgs) l_proc_target->getAttr<ATTR_SCOM_SWITCHES>(); // If Xscom is not already enabled. - if ((l_switches.useXscom != 1) || (l_switches.useFsiScom != 0)) + if ((l_switches.useXscom != 1) || (l_switches.useSbeScom != 0)) { - l_switches.useFsiScom = 0; + l_switches.useSbeScom = 0; l_switches.useXscom = 1; - // Turn off FSI scom and turn on Xscom. + // Turn off SBE scom and turn on Xscom. l_proc_target->setAttr<ATTR_SCOM_SWITCHES>(l_switches); - // Reset the FSI2OPB logic on the new chips - l_errl = FSI::resetPib2Opb(l_proc_target); + // Reset the FSI2OPB logic on the new chips + l_errl = FSI::resetPib2Opb(l_proc_target); // An SBE reset equivalent? if(l_errl) { TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, |
