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authorBill Hoffa <wghoffa@us.ibm.com>2018-04-25 15:43:53 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2018-05-07 16:18:19 -0400
commit59c3af1f3017baad7fe2e23290adefe0ddc47987 (patch)
tree62508355426befe8b5430e276b1b96af08e0be15 /src/usr/intr/intrrp.H
parent14f1070233d3cc4ffb62e76cd3482d3abe9aae59 (diff)
downloadtalos-hostboot-59c3af1f3017baad7fe2e23290adefe0ddc47987.tar.gz
talos-hostboot-59c3af1f3017baad7fe2e23290adefe0ddc47987.zip
Implement Interrupt Resource Provider Init for MPIPL Multi-Node Systems
- In MPIPL the HW interrupt config could be such that interrupts will cross node boundaries. HB handles interrupts independently on each node - so initialize INTRP in a way to handle this transition. - Modify the MPIPL flow with the following changes: a) Set the Interrupt LSI State Machine to disabled b) Enable LSI Mode via the Interrupt Control Register c) Force all nodes to sync after steps a + b - Enable INTRP Multi-Node MPIPL Sync Code developed in P8 - Each node will now initialize its own internode_info data area during an initial IPL - Coalescing of the Host will modify this data to define all the nodes in the system - During the MPIPL each node can view each others area to determine when all nodes have reached the common sync point - Remove Legacy P8 MPIPL INTRP Code that is not used Change-Id: Idb742eafc7389f328ea7f506c4c4541c989e52b6 RTC: 182712 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57993 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/intr/intrrp.H')
-rw-r--r--src/usr/intr/intrrp.H16
1 files changed, 9 insertions, 7 deletions
diff --git a/src/usr/intr/intrrp.H b/src/usr/intr/intrrp.H
index 3d6e0b667..2173113ae 100644
--- a/src/usr/intr/intrrp.H
+++ b/src/usr/intr/intrrp.H
@@ -574,6 +574,15 @@ namespace INTR
errlHndl_t sendXiveEOI(uint64_t& i_intSource, PIR_t& i_pir);
/**
+ * Send the PSI Host Bridge portion of the EOI (End of Interrupt)
+ * sequence
+ * @param[in] i_proc, the proc intrp handler
+ * @param[in] i_intSource, interrupt source to perform EOI for
+ * @return Errorlog from DeviceWrite
+ */
+ errlHndl_t sendPsiHbEOI(intr_hdlr_t* i_proc, uint64_t& i_intSource);
+
+ /**
* Function completes interrupt processing
* - Unmasks interrupt source
* - Sends XIVE EOI
@@ -843,13 +852,6 @@ namespace INTR
errlHndl_t addHbNodeToMpiplSyncArea(uint64_t i_hbNode);
/**
- * Extract node information stored away and restore into
- * ATTR for MPIPL
- * @return error log handle
- */
- errlHndl_t extractHbNodeInfo(void);
-
- /**
* Calculate the address offset for the given cpu
* @param[in] i_pir PIR value for the presenter
* @return the offset
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