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| author | Dan Crowell <dcrowell@us.ibm.com> | 2017-07-19 13:49:58 -0500 |
|---|---|---|
| committer | William G. Hoffa <wghoffa@us.ibm.com> | 2017-07-31 12:24:33 -0400 |
| commit | ad20498a1a7b857517759cbb173fe9d936107d63 (patch) | |
| tree | cba05569f1cc0c6f69ef6d46cb630a08aed5627c /src/usr/intr/intrrp.H | |
| parent | fadc1f7542d63ef55f383cf922db86d4f5e48ffe (diff) | |
| download | talos-hostboot-ad20498a1a7b857517759cbb173fe9d936107d63.tar.gz talos-hostboot-ad20498a1a7b857517759cbb173fe9d936107d63.zip | |
Fix race condition between INTR and SBEIO
Fixed a race condition in clearing out the PSU interrupt
register that existed between the INTR and SBEIO code.
We can sometimes lose interrupts for SBE PSU operations
which leads to a timeout.
Also added code to look for SBE errors if a PSU
operation times out
Change-Id: I8cdcdcc08956b038bcc65ad7e00a34719bf14c61
CQ: SW396057
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43339
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Elizabeth K. Liner <eliner@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/usr/intr/intrrp.H')
| -rw-r--r-- | src/usr/intr/intrrp.H | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/usr/intr/intrrp.H b/src/usr/intr/intrrp.H index db6669989..ecebf7e67 100644 --- a/src/usr/intr/intrrp.H +++ b/src/usr/intr/intrrp.H @@ -185,6 +185,7 @@ namespace INTR PSI_BRIDGE_ESB_OFF_OFFSET = 0xD00, PSI_BRIDGE_ESB_RESET_OFFSET = 0XC00, PSI_BRIDGE_PSU_DOORBELL_REG = 0x000D0063, + PSI_BRIDGE_PSU_DOORBELL_ANDREG = 0x000D0064, PSI_BRIDGE_PSU_HOST_DOORBELL = 0x8000000000000000, //XIVE Interrupt Controller Constants |
