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author | Dean Sanner <dsanner@us.ibm.com> | 2013-01-03 10:16:18 -0600 |
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committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2013-08-09 13:43:19 -0500 |
commit | 97bd69daf028bec2f7d7f4fbd8feb49486fb4577 (patch) | |
tree | 3168aba491fb1cbdd181c40c3e3947410a47e28e /src/usr/intr/intrrp.C | |
parent | 7b0dcb2cc3a80cb09aa2af5d4cd2f2673c7146a6 (diff) | |
download | talos-hostboot-97bd69daf028bec2f7d7f4fbd8feb49486fb4577.tar.gz talos-hostboot-97bd69daf028bec2f7d7f4fbd8feb49486fb4577.zip |
Basic devtree support
Simple devtree support for Sapphire in SPless mode
Change-Id: I4a70bfc5cd3eb3dbd1b443869c046c789f98cc95
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3739
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/intr/intrrp.C')
-rw-r--r-- | src/usr/intr/intrrp.C | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/src/usr/intr/intrrp.C b/src/usr/intr/intrrp.C index 8838d22cf..11339dbc6 100644 --- a/src/usr/intr/intrrp.C +++ b/src/usr/intr/intrrp.C @@ -1619,6 +1619,7 @@ void IntrRp::cleanCheck() } } + //---------------------------------------------------------------------------- // External interfaces //---------------------------------------------------------------------------- @@ -1831,3 +1832,20 @@ errlHndl_t INTR::enablePsiIntr(TARGETING::Target * i_target) return err; } +uint64_t INTR::getIntpAddr(const TARGETING::Target * i_ex, uint8_t i_thread) +{ + const TARGETING::Target * l_proc = getParentChip(i_ex); + uint64_t l_intB =l_proc->getAttr<TARGETING::ATTR_INTP_BASE_ADDR>(); + + PIR_t pir(0); + pir.nodeId = l_proc->getAttr<TARGETING::ATTR_FABRIC_NODE_ID>(); + pir.chipId = l_proc->getAttr<TARGETING::ATTR_FABRIC_CHIP_ID>(); + pir.coreId = i_ex->getAttr<TARGETING::ATTR_CHIP_UNIT>(); + pir.threadId = i_thread; + + return (l_intB+ InterruptMsgHdlr::mmio_offset( + pir.word & (InterruptMsgHdlr::P8_PIR_THREADID_MSK | + InterruptMsgHdlr::P8_PIR_COREID_MSK))); +} + + |