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authorMark Wenning <wenning@us.ibm.com>2011-12-12 16:53:40 -0600
committerMark W. Wenning <wenning@us.ibm.com>2012-01-20 16:42:41 -0600
commitd62d15ecce724013e04106ad4cf217b9b341ccfc (patch)
tree9ca43d67fb2570e5afd85578ce03d2323a3fc725 /src/usr/initservice/istepdispatcher
parent0408868bb339cab3222c5728012fca2306aa982b (diff)
downloadtalos-hostboot-d62d15ecce724013e04106ad4cf217b9b341ccfc.tar.gz
talos-hostboot-d62d15ecce724013e04106ad4cf217b9b341ccfc.zip
RTC4420 SPless on VPO
Modify SPLess code to use memory-mapped locations instead of SCOM scratchpad regs - Debug Framework does not support this at this time. VBU_Cacheline.pm is intended to be a module to read a single 64-bit word (which will be the spless command, status, and istepmode regs) from L3 memory within the AWAN model. CLread() will read the cacheline (at 128-byte boundaries) and then extract the quadword from the offet within the cacheline. CLwrite() will read/modify/write the quadword and cacheline. Note: There is a code block within VBU_Cacheline.pm called TEST - this returns dummy values to CLread and CLwrite so that I can run the perl script on a local system without connecting to simics or AWAN. It is not normally used. hb_istep is meant to be run after running a modified version of Jim McGuire's do_p8vbu_script_hbi-Sprint7 . See my public directory /gsa/ausgsa/home/w/e/wenning/Public/HBI/scripts for the modified script. These changes will be merged back into Jim McGuire's script later. The modified version loads the binaries into L3, sets up all the rest of the environment, and then exits BEFORE going into the execution loop. At that point, the user should run hb-istep --istepmode to set HostBoot up to run IStep SPLess (Single Step) . The user can then run hb-istep commands to execute isteps, etc. hb-istep use is documented on the wiki at https://w3-connections.ibm.com/wikis/home?lang=en_US#/wiki/Host%20Boot/page/HB%20ISteps%20on%20AWAN Please look there for updates. - first commit, branch vbu2 - modify spless to use memory locations instead of SCOM regs - add VBU_Cacheline.pm - archive temporary version of do_p8vbu_script_hbi-mark until we can get the hb-istep hooks into Jim McGuire's scripts - add test calls to VBU_Cacheline.pm - change flush call to Joe McGills "quiet" version - add note that p8_ins* calls are in Jim McGuires dir and will be replaced by the "official" ones soon. - experiment with git notes command, sorry for the thrash - add check to see if VPO is STOPPED before accessing anything - partial review fixes - blocked on model: can't test Change-Id: I07431dc525844c5c504175d92eae113457eac063 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/592 Tested-by: Jenkins Server Reviewed-by: CAMVAN T. NGUYEN <ctnguyen@us.ibm.com> Reviewed-by: Mark W. Wenning <wenning@us.ibm.com>
Diffstat (limited to 'src/usr/initservice/istepdispatcher')
-rw-r--r--src/usr/initservice/istepdispatcher/istepdispatcher.C111
-rw-r--r--src/usr/initservice/istepdispatcher/istepdispatcher.H14
-rw-r--r--src/usr/initservice/istepdispatcher/splesscommon.H168
3 files changed, 186 insertions, 107 deletions
diff --git a/src/usr/initservice/istepdispatcher/istepdispatcher.C b/src/usr/initservice/istepdispatcher/istepdispatcher.C
index 6ee6c18f5..0ad8333f2 100644
--- a/src/usr/initservice/istepdispatcher/istepdispatcher.C
+++ b/src/usr/initservice/istepdispatcher/istepdispatcher.C
@@ -44,7 +44,7 @@
#include <trace/interface.H> // trace support
#include <errl/errlentry.H> // errlHndl_t
#include <devicefw/userif.H> // targeting
-#include <sys/mmio.h> // mmio_scratch_read()
+
#include <initservice/taskargs.H> // TaskArgs structs
#include <errl/errluserdetails.H> // ErrlUserDetails base class
@@ -61,12 +61,13 @@
#include <isteps/istepmasterlist.H>
+// ----- namespace ERRORLOG -------------------------------------------
namespace ERRORLOG
{
/**
* @class IStepNameUserDetail
*
- * report the failing IStepName.
+ * report the failing IStepName to an errorlog
*
* @todo: get rid of magic numbers in version and subsection.
* set up tags, plugins, include files, etc.
@@ -108,15 +109,15 @@ IStepNameUserDetail(const IStepNameUserDetail &);
IStepNameUserDetail & operator=(const IStepNameUserDetail &);
};
-} // end namespace ERRORLOG
-
+} // ----- end namespace ERRORLOG -----------------------------------
+// ----- namespace INITSERVICE -------------------------------------------
namespace INITSERVICE
{
using namespace ERRORLOG; // IStepNameUserDetails
-using namespace SPLESS;
+using namespace SPLESS; // SingleStepMode
/******************************************************************************/
// Globals/Constants
@@ -124,41 +125,13 @@ using namespace SPLESS;
extern trace_desc_t *g_trac_initsvc;
/**
- * @note Since ISTEP_MODE attribute is nonvolatile (persists across boots),
- * we must have a way to turn the attribute both ON and OFF - we
- * cannot depend on the FSP to do it since we may not have a FSP.
- */
-const uint64_t ISTEP_MODE_ON_SIGNATURE = 0x4057b0074057b007;
-const uint64_t ISTEP_MODE_OFF_SIGNATURE = 0x700b7504700b7504;
-
-/**
- * @enum
- * SPLess Task return codes
- *
- * task return codes for SPless single step
- * @note future errors will be passed from task_create() and task_exec()
- * and should be documented in errno.h
- *
- */
-enum {
- SPLESS_TASKRC_INVALID_ISTEP = -3, // invalid istep or substep
- SPLESS_TASKRC_LAUNCH_FAIL = -4, // failed to launch the task
- SPLESS_TASKRC_RETURNED_ERRLOG = -5, // istep returned an errorlog
- SPLESS_TASKRC_TERMINATED = -6, // terminated the polling loop
-
- SPLESS_INVALID_COMMAND = 10, // invalid command from user console
-};
-
-/**
* @note SPLess PAUSE - These two constants are used in a nanosleep() call
* below to sleep between polls of the StatusReg. Typically this will
- * be about 100 ms - the actual value will be determined empirically.
- *
- * @debug simics "feature" - set polling time to 1 sec for demo
+ * be about 10 ms - the actual value will be determined empirically.
*
*/
-const uint64_t SINGLESTEP_PAUSE_S = 1;
-const uint64_t SINGLESTEP_PAUSE_NS = 100000000;
+const uint64_t SINGLESTEP_PAUSE_S = 0;
+const uint64_t SINGLESTEP_PAUSE_NS = 10000000;
/**
* @brief set up _start() task entry procedure using the macro in taskargs.H
@@ -241,7 +214,7 @@ void IStepDispatcher::init( void * io_ptr )
if ( getIStepMode() )
{
TRACFCOMP( g_trac_initsvc,
- "IStep single-step" );
+ "IStep single-step enable" );
// IStep single-step
singleStepISteps( io_ptr );
}
@@ -275,6 +248,7 @@ bool IStepDispatcher::getIStepMode( ) const
else
{
l_istepmodeflag = l_pTopLevel->getAttr<ATTR_ISTEP_MODE> ();
+ // printk( "IStep Mode flag = 0x%x\n", l_istepmodeflag );
}
@@ -282,50 +256,6 @@ bool IStepDispatcher::getIStepMode( ) const
}
-void IStepDispatcher::initIStepMode( )
-{
- using namespace TARGETING;
- uint64_t l_readData = 0;
- Target *l_pTopLevel = NULL;
- TargetService& l_targetService = targetService();
-
- (void) l_targetService.getTopLevelTarget(l_pTopLevel);
- if (l_pTopLevel == NULL)
- {
- TRACFCOMP( g_trac_initsvc, "Top level handle was NULL" );
- // drop through, default of attribute is is false
- }
- else
- {
- // got a pointer to Targeting, complete setting the flag
- l_readData = mmio_scratch_read( MMIO_SCRATCH_IPLSTEP_CONFIG );
-
- TRACDCOMP( g_trac_initsvc,
- "SCOM ScratchPad read, Offset 0x%x, Data 0x%llx",
- MMIO_SCRATCH_IPLSTEP_CONFIG,
- l_readData );
-
- // check for IStep Mode signature(s)
- if ( l_readData == ISTEP_MODE_ON_SIGNATURE )
- {
- l_pTopLevel->setAttr<ATTR_ISTEP_MODE> (true );
- TRACDCOMP( g_trac_initsvc,
- "ISTEP_MODE attribute set to TRUE." );
- }
-
- if ( l_readData == ISTEP_MODE_OFF_SIGNATURE )
- {
- l_pTopLevel->setAttr<ATTR_ISTEP_MODE> ( false );
- TRACDCOMP( g_trac_initsvc,
- "ISTEP_MODE attribute set to FALSE." );
- }
- }
-
-}
-
-
-
-
/**
* @brief Command 0: Run the requested IStep/SubStep
*
@@ -364,6 +294,14 @@ void IStepDispatcher::processSingleIStepCmd(
l_sts.substep = l_cmd.substep;
l_sts.istepStatus = 0;
+ /**
+ * @todo post informational errl here.
+ */
+ TRACFCOMP( g_trac_initsvc,
+ "processSingleIStepCmd: ERROR: Cannot find IStep=%d, SubStep=%d",
+ l_cmd.istep,
+ l_cmd.substep );
+
// return to caller to write back to user console
o_rrawsts.val64 = l_sts.val64;
break;
@@ -378,6 +316,12 @@ void IStepDispatcher::processSingleIStepCmd(
l_sts.substep = l_cmd.substep;
l_sts.istepStatus = 0;
+ TRACFCOMP( g_trac_initsvc,
+ "processSingleIStepCmd: Running IStep=%d, SubStep=%d",
+ l_cmd.istep,
+ l_cmd.substep );
+
+
// write intermediate value back to user console
o_rrawsts.val64 = l_sts.val64;
writeSts( o_rrawsts );
@@ -446,6 +390,11 @@ void IStepDispatcher::processSingleIStepCmd(
l_sts.substep = l_cmd.substep;
// istepStatus set above
+
+ /**
+ * @todo post informational errl here.
+ */
+
// write to status reg, return to caller to write to user console
o_rrawsts.val64 = l_sts.val64;
diff --git a/src/usr/initservice/istepdispatcher/istepdispatcher.H b/src/usr/initservice/istepdispatcher/istepdispatcher.H
index 5add1008c..48a8df18d 100644
--- a/src/usr/initservice/istepdispatcher/istepdispatcher.H
+++ b/src/usr/initservice/istepdispatcher/istepdispatcher.H
@@ -122,20 +122,6 @@ private:
/**
- * @brief init iv_istepmode flag, called in constructor
- *
- * Call into PNOR and fetch the "IStepMode flag" .
- *
- * @todo currently this calls into the kernel to get the value of
- * an SCOM Scratch Reg - this will change when PNOR is finished
- *
- * @return nothing
- *
- */
- void initIStepMode( );
-
-
- /**
* @brief getIStepMode - return value of IStep Mode
*
* @return bool - value of iv_istepmodeflag
diff --git a/src/usr/initservice/istepdispatcher/splesscommon.H b/src/usr/initservice/istepdispatcher/splesscommon.H
index d08b920c2..3cda0986c 100644
--- a/src/usr/initservice/istepdispatcher/splesscommon.H
+++ b/src/usr/initservice/istepdispatcher/splesscommon.H
@@ -41,6 +41,35 @@
#include <stdio.h>
#include <string.h>
+// undefine this before checking in....
+// #define SPLESS_DEBUG 1
+
+#ifdef SPLESS_DEBUG
+ #include <kernel/console.H> // printk DEBUG
+#endif
+
+#include <sys/mmio.h> // mmio_scratch_read()
+
+
+// external reference
+namespace INITSERVICE
+{
+ extern trace_desc_t *g_trac_initsvc;
+} // end namespace INITSERVICE
+
+
+/******************************************************************************/
+// SPLESS Command and Status Prototypes
+/******************************************************************************/
+
+/**
+ * @namespace SPLESSCMD
+ *
+ * Contains functions to manipulate the SPLESS Command Register
+ *
+ */
+namespace SPLESS
+{
/**
* @note Since ISTEP_MODE attribute is nonvolatile (persists across boots),
@@ -50,22 +79,122 @@
const uint64_t ISTEP_MODE_ON_SIGNATURE = 0x4057b0074057b007;
const uint64_t ISTEP_MODE_OFF_SIGNATURE = 0x700b7504700b7504;
-/******************************************************************************/
-// SPLESS Command Prototypes
-/******************************************************************************/
+/**
+ * @enum
+ * SPLess Task return codes
+ *
+ * task return codes for SPless single step
+ * @note future errors will be passed from task_create() and task_exec()
+ * and should be documented in errno.h
+ *
+ */
+enum {
+ SPLESS_TASKRC_INVALID_ISTEP = -3, // invalid istep or substep
+ SPLESS_TASKRC_LAUNCH_FAIL = -4, // failed to launch the task
+ SPLESS_TASKRC_RETURNED_ERRLOG = -5, // istep returned an errorlog
+ SPLESS_TASKRC_TERMINATED = -6, // terminated the polling loop
+
+ SPLESS_INVALID_COMMAND = 10, // invalid command from user console
+};
/**
- * @namespace SPLESSCMD
+ * @note declare global regs to implement SPLess.
+ * These replace the SCOM regs that are accessed by mmio; the reason we
+ * are changing this is that there is no support at present for read/writing
+ * SCOM in the Debug Framework.
+ * This will have to be modified again when we get to Secure Boot
*
- * Contains functions to manipulate the SPLESS Command Register
+ * @todo An review issue came up about when and how these are updated -
+ * While hostboot is running in SIMICS or VBU, the user console (i.e. a
+ * perl script, see src/build/vpo/hb_istep) will stop the instruction clock,
+ * write a command to g_SPLess_Command_Reg, and then restart the clock.
+ *
+ * Q1) In non-VPO mode (real FSP) are we always going to stop instructions
+ * to the processor to modify these variables?
+ * A: Yes, at this writing. If this changes, we should revisit this
+ * implementation.
+ *
+ * Q1a) Do these memory locations need to be accessed atomically (i.e. using
+ * __sync_add_and_fetch() and/or isync()/sync() )?
+ * A: No, not at this writing.
*
+ * Q2) When we stop instructions to the processor is the instruction pipeline
+ * and load/store queues flushed?
+ *
+ * A: No. The stop commands used in the simulator user console should
+ * quiesce the processor; this should guarantee that there are no
+ * outstanding loads or stores.
*/
-namespace SPLESS
-{
+extern uint64_t g_SPLess_Command_Reg;
+extern uint64_t g_SPLess_Status_Reg;
+extern uint64_t g_SPLess_IStepMode_Reg;
+/**
+ * @note SPLess commands, and masks for the status. Currently we only
+ * support one command through the SPLess interface.
+ *
+ */
const uint8_t SPLESS_SINGLE_ISTEP_CMD = 0x00;
const uint64_t SPLESS_SINGLE_STEP_STS_MASK = 0x00000000ffffffff;
+/**
+ * @brief init ISTEP_MODE attribute
+ *
+ * @return nothing
+ *
+ */
+inline void initIStepMode( )
+{
+ using namespace TARGETING;
+ uint64_t l_readData = 0;
+ Target *l_pTopLevel = NULL;
+ TargetService& l_targetService = targetService();
+
+ (void) l_targetService.getTopLevelTarget(l_pTopLevel);
+ if (l_pTopLevel == NULL)
+ {
+ TRACFCOMP( INITSERVICE::g_trac_initsvc, "Top level handle was NULL" );
+ // drop through, default of attribute is is false
+ }
+ else
+ {
+ // got a pointer to Targeting, complete setting the flag
+ // $$ save l_readData = mmio_scratch_read( MMIO_SCRATCH_IPLSTEP_CONFIG );
+ l_readData = g_SPLess_IStepMode_Reg;
+
+#ifdef SPLESS_DEBUG
+ printk( "IStepMode Reg = 0x%p, 0x%lx\n", &g_SPLess_IStepMode_Reg, l_readData );
+ printk( "Status Reg = 0x%p\n", &g_SPLess_Status_Reg );
+ printk( "Command Reg = 0x%p\n", &g_SPLess_Command_Reg );
+#endif
+ TRACDCOMP( INITSERVICE::g_trac_initsvc,
+ "IStepMode Reg = 0x%llx",
+ l_readData );
+
+ // check for IStep Mode signature(s)
+ if ( l_readData == ISTEP_MODE_ON_SIGNATURE )
+ {
+ l_pTopLevel->setAttr<ATTR_ISTEP_MODE> (true );
+
+ TRACDCOMP( INITSERVICE::g_trac_initsvc,
+ "ISTEP_MODE attribute set to TRUE." );
+ }
+ else if ( l_readData == ISTEP_MODE_OFF_SIGNATURE )
+ {
+ l_pTopLevel->setAttr<ATTR_ISTEP_MODE> ( false );
+
+ TRACDCOMP( INITSERVICE::g_trac_initsvc,
+ "ISTEP_MODE attribute set to FALSE." );
+ }
+ else
+ {
+ TRACFCOMP( INITSERVICE::g_trac_initsvc,
+ "unknown ISTEP_MODE signature: 0x%llx",
+ l_readData );
+ }
+ }
+
+}
/**
* @struct CommandHdr
@@ -155,7 +284,11 @@ private:
inline void readCmd( SPLessCmd &io_rcmd )
{
- io_rcmd.val64 = mmio_scratch_read(MMIO_SCRATCH_IPLSTEP_COMMAND);
+ // $$ save io_rcmd.val64 = mmio_scratch_read(MMIO_SCRATCH_IPLSTEP_COMMAND);
+ io_rcmd.val64 = g_SPLess_Command_Reg;
+#ifdef SPLESS_DEBUG
+ printk( "readCmd 0x%lx\n", g_SPLess_Command_Reg );
+#endif
}
@@ -172,7 +305,11 @@ inline void readCmd( SPLessCmd &io_rcmd )
inline void writeCmd( SPLessCmd &io_rcmd )
{
- mmio_scratch_write( MMIO_SCRATCH_IPLSTEP_COMMAND, io_rcmd.val64 );
+ // $$ save mmio_scratch_write( MMIO_SCRATCH_IPLSTEP_COMMAND, io_rcmd.val64 );
+ g_SPLess_Command_Reg = io_rcmd.val64;
+#ifdef SPLESS_DEBUG
+ printk( "writeCmd 0x%lx\n", g_SPLess_Command_Reg );
+#endif
}
@@ -260,7 +397,11 @@ union SPLessSingleIStepSts {
inline void readSts( SPLessSts &io_rsts )
{
- io_rsts.val64 = mmio_scratch_read(MMIO_SCRATCH_IPLSTEP_STATUS);
+ // $$ save io_rsts.val64 = mmio_scratch_read(MMIO_SCRATCH_IPLSTEP_STATUS);
+ io_rsts.val64 = g_SPLess_Status_Reg;
+#ifdef SPLESS_DEBUG
+ printk( "readSts 0x%lx\n", g_SPLess_Status_Reg );
+#endif
}
/**
@@ -272,8 +413,11 @@ inline void readSts( SPLessSts &io_rsts )
*/
inline void writeSts( SPLessSts &io_rsts )
{
- mmio_scratch_write( MMIO_SCRATCH_IPLSTEP_STATUS, io_rsts.val64 );
-
+ // $$ save mmio_scratch_write( MMIO_SCRATCH_IPLSTEP_STATUS, io_rsts.val64 );
+ g_SPLess_Status_Reg = io_rsts.val64;
+#ifdef SPLESS_DEBUG
+ printk( "writeSts 0x%lx\n", g_SPLess_Status_Reg );
+#endif
}
} // namespace
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