Add explicit delays to centaur sensor cache enable and disable

We discovered that if multiple Centaur i2c operations are running
while the chip is trying to read the dimm temps that we will
eventually time out the OCC due to collisions.  TO fix this we
need to add explicit delays between enable->disable (30ms) and
also between disable->enable (2ms) to allow the sensor cache to
get valid data.

Change-Id: I16c96482f4827097d9af7b1e08dcd42375ae8d30
CQ: SW354148
ForwardPort: yes
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25723
Tested-by: Jenkins Server
Tested-by: Jenkins OP Build CI
Tested-by: Jenkins OP HW
Tested-by: FSP CI Jenkins
Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25982

1 files changed, 13 insertions, 1 deletions

diff --git a/src/usr/i2c/runtime/rt_i2c.C b/src/usr/i2c/runtime/rt_i2c.C
index a74bb5dd0..9ae1e7b44 100755
--- a/src/usr/i2c/runtime/rt_i2c.C
+++ b/src/usr/i2c/runtime/rt_i2c.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015                             */
+/* Contributors Listed Below - COPYRIGHT 2015,2016                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -282,6 +282,13 @@ errlHndl_t i2cDisableSensorCache ( TARGETING::Target * i_target,
 
     do
     {
+        // There must be a 30ms window between the last time the cache
+        //  was enabled and the next time it is disabled.  Since we
+        //  have no way to easily track the last enablement, we will
+        //  just take the hit inside every disable call.
+        TRACDCOMP( g_trac_i2c, "Delaying 30ms before disable" );
+        nanosleep(0,30 * NS_PER_MSEC);
+
         uint64_t scacData = 0x0;
         size_t dataSize = sizeof(scacData);
 
@@ -335,6 +342,11 @@ errlHndl_t i2cEnableSensorCache ( TARGETING::Target * i_target )
     TRACDCOMP( g_trac_i2c,
                ENTER_MRK"i2cEnableSensorCache()" );
 
+    // There must be a 2ms window where the cache is disabled to avoid
+    //  some thrashing in the Centaur logic.
+    TRACDCOMP( g_trac_i2c, "Delaying 2ms before enable" );
+    nanosleep(0,2 * NS_PER_MSEC);
+
     uint64_t scacData = SCAC_ENABLE_MSK;
     size_t dataSize = sizeof(scacData);