diff options
author | Dan Crowell <dcrowell@us.ibm.com> | 2019-06-18 16:03:40 -0500 |
---|---|---|
committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2019-06-21 15:02:10 -0500 |
commit | 33a1e9fabb0638ba4f0a7d5032750e65c7bb8300 (patch) | |
tree | 3a23458a75e7de8c753b84194326cbf5ae93a764 /src/usr/i2c/i2c.C | |
parent | b75cfea6155c15c12f1dc0679c5459473026610f (diff) | |
download | talos-hostboot-33a1e9fabb0638ba4f0a7d5032750e65c7bb8300.tar.gz talos-hostboot-33a1e9fabb0638ba4f0a7d5032750e65c7bb8300.zip |
Modify I2C divider for Axone
Axone modified the internal divider that is used to calculate
the i2c bus speed from 4 to 2.
Change-Id: Ic2be08cfe97f3ea20f94e97d11ecaeb3ba679660
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/79152
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr/i2c/i2c.C')
-rwxr-xr-x | src/usr/i2c/i2c.C | 26 |
1 files changed, 21 insertions, 5 deletions
diff --git a/src/usr/i2c/i2c.C b/src/usr/i2c/i2c.C index 97334408b..4fbe4db24 100755 --- a/src/usr/i2c/i2c.C +++ b/src/usr/i2c/i2c.C @@ -94,6 +94,7 @@ TRAC_INIT( & g_trac_i2cr, "I2CR", KILOBYTE ); #define MAX_NACK_RETRIES 3 #define PAGE_OPERATION 0xffffffff // Special value use to determine type of op #define P9_ENGINE_SCOM_OFFSET 0x1000 +constexpr uint64_t FSI_BUS_SPEED_MHZ = 133; //FSI runs at 133MHz // Derived from ATTR_I2C_BUS_SPEED_ARRAY[engine][port] attribute const TARGETING::ATTR_I2C_BUS_SPEED_ARRAY_type g_var = {{NULL}}; @@ -4316,13 +4317,23 @@ errlHndl_t i2cSetBusVariables ( TARGETING::Target * i_target, if ( io_args.switches.useFsiI2C == 1 ) { - // @todo RTC 117560 - verify correct frequency - local_bus_MHZ = g_I2C_NEST_FREQ_MHZ; + // For FSI I2C we should use the FSI clock + local_bus_MHZ = FSI_BUS_SPEED_MHZ; } else { - // For Host I2C use Nest Frequency - local_bus_MHZ = g_I2C_NEST_FREQ_MHZ; + // For Host I2C use Nest Frequency as base + + // PIB_CLK = NEST_FREQ / 4 + uint64_t pib_clk = g_I2C_NEST_FREQ_MHZ / 4; + +#ifdef CONFIG_AXONE + // Axone has a by-2 internal divider + local_bus_MHZ = pib_clk / 2; +#else + // Nimbus/Cumulus have a by-4 internal divider + local_bus_MHZ = pib_clk / 4; +#endif } io_args.bit_rate_divisor = i2cGetBitRateDivisor(io_args.bus_speed, @@ -5156,8 +5167,13 @@ void getMasterInfo( const TARGETING::Target* i_chip, info.engine = engine; info.freq = i2cGetNestFreq()*FREQ_CONVERSION::HZ_PER_MHZ; // PIB_CLK = NEST_FREQ /4 - // Local Bus = PIB_CLK / 4 +#ifdef CONFIG_AXONE + // Local Bus = PIB_CLK / 2 [Axone] + info.freq = info.freq/8; //convert nest to local bus +#else + // Local Bus = PIB_CLK / 4 [Nimbus/Cumulus] info.freq = info.freq/16; //convert nest to local bus +#endif TRACFCOMP(g_trac_i2c,"getMasterInfo(%.8X): pushing back engine=%d, scomAddr=0x%X",TARGETING::get_huid(i_chip), engine, info.scomAddr); |