Config flag to enable ONLY ipl time checktop analysis

Change-Id: I87dcd01e82436828e1a6fa4db5a79281c7ce1b66
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20864
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

5 files changed, 11 insertions, 11 deletions

diff --git a/src/usr/hwpf/hwp/core_activate/core_activate.C b/src/usr/hwpf/hwp/core_activate/core_activate.C
index 8fc317327..e9c729b5f 100644
--- a/src/usr/hwpf/hwp/core_activate/core_activate.C
+++ b/src/usr/hwpf/hwp/core_activate/core_activate.C
@@ -85,7 +85,7 @@
 #include    <diag/prdf/prdfMain.H>
 #include <util/misc.H>
 
-#ifdef CONFIG_ENABLE_CHECKSTOP_ANALYSIS
+#ifdef CONFIG_IPLTIME_CHECKSTOP_ANALYSIS
     #include    <occ/occ_common.H>
 #endif
 
@@ -641,7 +641,7 @@ void*    call_host_activate_slave_cores( void    *io_pArgs )
 
     // @@@@@    END CUSTOM BLOCK:   @@@@@
 
-#ifdef CONFIG_ENABLE_CHECKSTOP_ANALYSIS
+#ifdef CONFIG_IPLTIME_CHECKSTOP_ANALYSIS
     if( l_stepError.isNull() )
     {
         // update firdata inputs for OCC
diff --git a/src/usr/hwpf/hwp/dram_initialization/dram_initialization.C b/src/usr/hwpf/hwp/dram_initialization/dram_initialization.C
index 53cde0d53..70f402f31 100644
--- a/src/usr/hwpf/hwp/dram_initialization/dram_initialization.C
+++ b/src/usr/hwpf/hwp/dram_initialization/dram_initialization.C
@@ -82,7 +82,7 @@
 #include <dump/dumpif.H>
 #include <vfs/vfs.H>
 
-#ifdef CONFIG_ENABLE_CHECKSTOP_ANALYSIS
+#ifdef CONFIG_IPLTIME_CHECKSTOP_ANALYSIS
     #include    <occ/occ_common.H>
 #endif
 
@@ -137,7 +137,7 @@ void*    call_host_startprd_dram( void    *io_pArgs )
     // @@@@@    END CUSTOM BLOCK:   @@@@@
 #endif
 
-#ifdef CONFIG_ENABLE_CHECKSTOP_ANALYSIS
+#ifdef CONFIG_IPLTIME_CHECKSTOP_ANALYSIS
     // update firdata inputs for OCC
     TARGETING::Target* masterproc = NULL;
     TARGETING::targetService().masterProcChipTargetHandle(masterproc);
diff --git a/src/usr/hwpf/hwp/edi_ei_initialization/edi_ei_initialization.C b/src/usr/hwpf/hwp/edi_ei_initialization/edi_ei_initialization.C
index c02d91985..98a398a1e 100644
--- a/src/usr/hwpf/hwp/edi_ei_initialization/edi_ei_initialization.C
+++ b/src/usr/hwpf/hwp/edi_ei_initialization/edi_ei_initialization.C
@@ -85,7 +85,7 @@
 // eRepair Restore
 #include <erepairAccessorHwpFuncs.H>
 
-#ifdef CONFIG_ENABLE_CHECKSTOP_ANALYSIS
+#ifdef CONFIG_IPLTIME_CHECKSTOP_ANALYSIS
     #include    <occ/occ_common.H>
 #endif
 
@@ -713,7 +713,7 @@ void*    call_host_startprd_pbus( void    *io_pArgs )
             break;
         }
 
-#ifdef CONFIG_ENABLE_CHECKSTOP_ANALYSIS
+#ifdef CONFIG_IPLTIME_CHECKSTOP_ANALYSIS
         // update firdata inputs for OCC
         TARGETING::Target* masterproc = NULL;
         TARGETING::targetService().masterProcChipTargetHandle(masterproc);
diff --git a/src/usr/hwpf/hwp/occ/occ.C b/src/usr/hwpf/hwp/occ/occ.C
index 2b062cd87..faa64b3cb 100644
--- a/src/usr/hwpf/hwp/occ/occ.C
+++ b/src/usr/hwpf/hwp/occ/occ.C
@@ -160,7 +160,7 @@ namespace HBOCC
                 break;
             }
 
-#ifdef CONFIG_ENABLE_CHECKSTOP_ANALYSIS
+#ifdef CONFIG_IPLTIME_CHECKSTOP_ANALYSIS
 #ifndef __HOSTBOOT_RUNTIME
             if (i_useSRAM)
             {
diff --git a/src/usr/hwpf/hwp/occ/occ_common.C b/src/usr/hwpf/hwp/occ/occ_common.C
index 1075f3773..eb18ecef5 100644
--- a/src/usr/hwpf/hwp/occ/occ_common.C
+++ b/src/usr/hwpf/hwp/occ/occ_common.C
@@ -122,7 +122,7 @@ namespace HBOCC
         return l_errl;
     }
 
-#ifdef CONFIG_ENABLE_CHECKSTOP_ANALYSIS
+#ifdef CONFIG_IPLTIME_CHECKSTOP_ANALYSIS
     errlHndl_t loadOCCImageDuringIpl( TARGETING::Target* i_target,
                                         void* i_occVirtAddr)
     {
@@ -289,7 +289,7 @@ namespace HBOCC
         return l_errl;
     } // loadHostDataToHomer
 
-#ifdef CONFIG_ENABLE_CHECKSTOP_ANALYSIS
+#ifdef CONFIG_IPLTIME_CHECKSTOP_ANALYSIS
 #ifndef __HOSTBOOT_RUNTIME
     /**
      * @brief Sets up OCC Host data in SRAM
@@ -485,7 +485,7 @@ namespace HBOCC
                 break;
             }
 
-#ifdef CONFIG_ENABLE_CHECKSTOP_ANALYSIS
+#ifdef CONFIG_IPLTIME_CHECKSTOP_ANALYSIS
           if (i_useSRAM)
           {
             void* occVirt = reinterpret_cast<void *>(i_occImgVaddr);
@@ -504,7 +504,7 @@ namespace HBOCC
             //Load the OCC HOMER image
             //==============================
 
-#ifdef CONFIG_ENABLE_CHECKSTOP_ANALYSIS
+#ifdef CONFIG_IPLTIME_CHECKSTOP_ANALYSIS
             // clear (up to and including) the IPL Flag
             const uint32_t l_SramAddrApp = OCC_SRAM_ADDRESS;
             ecmdDataBufferBase l_occAppData((OCC_OFFSET_IPL_FLAG + 6) * 8 /* bits */);