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| author | Thi Tran <thi@us.ibm.com> | 2014-11-21 10:27:23 -0600 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2014-12-02 18:04:55 -0600 |
| commit | aeb70d93bba10dcddc9d4f8f35b460359cf864c2 (patch) | |
| tree | a646d2ac650bdc14dd787e223eb6463050f193bd /src/usr/hwpf/hwp/proc_chip_ec_feature.xml | |
| parent | 0ec38885b504dcadb28293d6bb5e77b4a28e65b1 (diff) | |
| download | talos-hostboot-aeb70d93bba10dcddc9d4f8f35b460359cf864c2.tar.gz talos-hostboot-aeb70d93bba10dcddc9d4f8f35b460359cf864c2.zip | |
SW287698: INITPROC: FSP&Hostboot - P8 HWP Changes week of 11/11/14
Change-Id: Id27ae8c291d0037530c51978947821b4f3d9ef78
CQ:SW287698
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14593
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14594
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp/proc_chip_ec_feature.xml')
| -rw-r--r-- | src/usr/hwpf/hwp/proc_chip_ec_feature.xml | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/src/usr/hwpf/hwp/proc_chip_ec_feature.xml b/src/usr/hwpf/hwp/proc_chip_ec_feature.xml index 0647550e0..3f14981f9 100644 --- a/src/usr/hwpf/hwp/proc_chip_ec_feature.xml +++ b/src/usr/hwpf/hwp/proc_chip_ec_feature.xml @@ -22,14 +22,14 @@ <!-- permissions and limitations under the License. --> <!-- --> <!-- IBM_PROLOG_END_TAG --> -<!-- $Id: proc_chip_ec_feature.xml,v 1.59 2014/10/23 18:56:33 jklazyns Exp $ --> +<!-- $Id: proc_chip_ec_feature.xml,v 1.60 2014/10/29 21:33:52 szhong Exp $ --> <!-- Defines the attributes that are based on EC level --> <attributes> <attribute> <id>ATTR_CHIP_EC_FEATURE_VENICE_SPECIFIC</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> - For Venice specific inits. Returns true if Venice and Naples. + For Venice specific inits. Returns true if Venice. </description> <chipEcFeature> <chip> @@ -230,7 +230,7 @@ <description> Returns if a chip contains SCOM configuration for CAPP unit PB hang recovery controls. True if: Murano EC 0x20 or greater - Venice EC 0x10 or greater + Venice EC 0x20 or greater Naples EC 0x10 or greater </description> <chipEcFeature> @@ -1219,7 +1219,13 @@ <id>ATTR_PROC_EC_MSS_RECONFIG_POSSIBLE</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> - </description> + Reset some DMI channels when re-ipl + Consumed by proc_enable_reconfig + True if: + Murano EC greater than or equal to 0x20 + Venice EC greater than or equal to 0x20 + Naples EC greater than or equal to 0x10 + </description> <chipEcFeature> <chip> <name>ENUM_ATTR_NAME_MURANO</name> |
