diff options
author | Adam Muhle <armuhle@us.ibm.com> | 2013-04-26 10:07:20 -0500 |
---|---|---|
committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2013-05-15 12:57:32 -0500 |
commit | 722ff9bff1f0d7830ef166822e32500accc421f9 (patch) | |
tree | a20c45f23d8433cf70cc73898177318b0da57d20 /src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pcbs_firinit.C | |
parent | cdf07e157ef6173e5b4d1f3f39556ffad2884d0e (diff) | |
download | talos-hostboot-722ff9bff1f0d7830ef166822e32500accc421f9.tar.gz talos-hostboot-722ff9bff1f0d7830ef166822e32500accc421f9.zip |
AVP OCC Enable & Procedure Refresh
Refreshed OCC Procedures
Enabled OCC in AVP mode for all processors
Merged SLW and OCC to common HOMER image
RTC:50987
Change-Id: I08d9128dfcb572367c145ee0296a48292584a480
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4340
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pcbs_firinit.C')
-rwxr-xr-x | src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pcbs_firinit.C | 341 |
1 files changed, 183 insertions, 158 deletions
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pcbs_firinit.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pcbs_firinit.C index c141f7ee4..969fa15e7 100755 --- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pcbs_firinit.C +++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pcbs_firinit.C @@ -20,25 +20,8 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -/* begin_generated_IBM_copyright_prolog */ -/* */ -/* This is an automatically generated copyright prolog. */ -/* After initializing, DO NOT MODIFY OR MOVE */ -/* --------------------------------------------------------------- */ -/* IBM Confidential */ -/* */ -/* Licensed Internal Code Source Materials */ -/* */ -/* (C)Copyright IBM Corp. 2014, 2014 */ -/* */ -/* The Source code for this program is not published or otherwise */ -/* divested of its trade secrets, irrespective of what has been */ -/* deposited with the U.S. Copyright Office. */ -/* -------------------------------------------------------------- */ -/* */ -/* end_generated_IBM_copyright_prolog */ -// $Id: p8_pm_pcbs_firinit.C,v 1.7 2012/10/16 13:43:50 pchatnah Exp $ -// $Source: /afs/awd.austin.ibm.com/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_pcbs_firinit.C,v $ +// $Id: p8_pm_pcbs_firinit.C,v 1.10 2013/04/01 04:25:41 stillgs Exp $ +// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_pcbs_firinit.C,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2011 // *! All Rights Reserved -- Property of IBM @@ -59,10 +42,10 @@ /// High-level procedure flow: /// /// get all functional child chiplets -/// +/// /// loop over all functional chiplets { /// calculate address -/// set the error mask in order to mask all errors +/// set the error mask in order to mask all errors /// /// } /// @@ -77,8 +60,6 @@ #include <fapi.H> #include "p8_scom_addresses.H" #include "p8_pm_pcbs_firinit.H" -#include "p8_pm_firinit.H" - extern "C" { @@ -88,9 +69,6 @@ using namespace fapi; // Constant definitions // ---------------------------------------------------------------------- - - - // ---------------------------------------------------------------------- // Macro definitions // ---------------------------------------------------------------------- @@ -102,167 +80,214 @@ using namespace fapi; // #define SET_MALF_ALERT(b){SET_FIR_ACTION(b, 1, 1);} // #define SET_FIR_MASKED(b){SET_FIR_MASK(b,1);} - // ---------------------------------------------------------------------- // Global variables // ---------------------------------------------------------------------- - - - - // ---------------------------------------------------------------------- // Function prototypes // ---------------------------------------------------------------------- - - - // ---------------------------------------------------------------------- // Function definitions // ---------------------------------------------------------------------- fapi::ReturnCode -p8_pm_pcbs_firinit(const fapi::Target &i_target ) +p8_pm_pcbs_firinit(const fapi::Target &i_target , uint32_t mode ) { + fapi::ReturnCode rc; ecmdDataBufferBase action_0(64); ecmdDataBufferBase action_1(64); ecmdDataBufferBase mask(64); - std::vector<fapi::Target> l_exChiplets; - fapi::TargetState l_state = TARGET_STATE_FUNCTIONAL; // TARGET_STATE_PRESENT or TARGET_STATE_FUNCTIONAL. It just depends on what you want to do. - + std::vector<fapi::Target> l_exChiplets; + fapi::TargetState l_state = TARGET_STATE_FUNCTIONAL; uint8_t l_functional = 0; uint8_t l_ex_number = 0; - uint32_t e_rc = 0; - - - FAPI_INF(""); - FAPI_INF("Executing proc_pm_pcbs_firinit ....\n"); - - - - - - SET_FIR_MASKED(PCBS_SLEEP_ENTRY_NOTIFY_PMC_HANG_ERR_MASK); - SET_FIR_MASKED(PCBS_SLEEP_ENTRY_NOTIFY_PMC_ASSIST_HANG_ERR_MASK); - SET_FIR_MASKED(PCBS_SLEEP_ENTRY_NOTIFY_PMC_ERR_MASK); - SET_FIR_MASKED(PCBS_SLEEP_EXIT_INVOKE_PORE_ERR_MASK); - SET_FIR_MASKED(PCBS_WINKLE_ENTRY_NOTIFY_PMC_ERR_MASK); - SET_FIR_MASKED(PCBS_WINKLE_ENTRY_SEND_INT_ASSIST_ERR_MASK); - SET_FIR_MASKED(PCBS_WINKLE_EXIT_NOTIFY_PMC_ERR_MASK); - SET_FIR_MASKED(PCBS_WAIT_DPLL_LOCK_ERR_MASK); - SET_FIR_MASKED(PCBS_SPARE8_ERR_MASK); - SET_FIR_MASKED(PCBS_WINKLE_EXIT_SEND_INT_ASSIST_ERR_MASK); - SET_FIR_MASKED(PCBS_WINKLE_EXIT_SEND_INT_POWUP_ASSIST_ERR_MASK); - SET_FIR_MASKED(PCBS_WRITE_FSM_GOTO_REG_IN_INVALID_STATE_ERR_MASK); - SET_FIR_MASKED(PCBS_WRITE_PMGP0_IN_INVALID_STATE_ERR_MASK); - SET_FIR_MASKED(PCBS_FREQ_OVERFLOW_IN_PSTATE_MODE_ERR_MASK); - SET_FIR_MASKED(PCBS_ECO_RS_BYPASS_CONFUSION_ERR_MASK); - SET_FIR_MASKED(PCBS_CORE_RS_BYPASS_CONFUSION_ERR_MASK); - SET_FIR_MASKED(PCBS_READ_LPST_IN_PSTATE_MODE_ERR_MASK); - SET_FIR_MASKED(PCBS_LPST_READ_CORR_ERR_MASK); - SET_FIR_MASKED(PCBS_LPST_READ_UNCORR_ERR_MASK); - SET_FIR_MASKED(PCBS_PFET_STRENGTH_OVERFLOW_ERR_MASK); - SET_FIR_MASKED(PCBS_VDS_LOOKUP_ERR_MASK); - SET_FIR_MASKED(PCBS_IDLE_INTERRUPT_TIMEOUT_ERR_MASK); - SET_FIR_MASKED(PCBS_PSTATE_INTERRUPT_TIMEOUT_ERR_MASK); - SET_FIR_MASKED(PCBS_GLOBAL_ACTUAL_SYNC_INTERRUPT_TIMEOUT_ERR_MASK); - SET_FIR_MASKED(PCBS_PMAX_SYNC_INTERRUPT_TIMEOUT_ERR_MASK); - SET_FIR_MASKED(PCBS_GLOBAL_ACTUAL_PSTATE_PROTOCOL_ERR_MASK); - SET_FIR_MASKED(PCBS_PMAX_PROTOCOL_ERR_MASK); - SET_FIR_MASKED(PCBS_IVRM_GROSS_OR_FINE_ERR_MASK); - SET_FIR_MASKED(PCBS_IVRM_RANGE_ERR_MASK); - SET_FIR_MASKED(PCBS_DPLL_CPM_FMIN_ERR_MASK); - SET_FIR_MASKED(PCBS_DPLL_DCO_FULL_ERR_MASK); - SET_FIR_MASKED(PCBS_DPLL_DCO_EMPTY_ERR_MASK); - SET_FIR_MASKED(PCBS_DPLL_INT_ERR_MASK); - SET_FIR_MASKED(PCBS_FMIN_AND_NOT_CPMBIT_ERR_MASK); - SET_FIR_MASKED(PCBS_DPLL_FASTER_THAN_FMAX_PLUS_DELTA1_ERR_MASK); - SET_FIR_MASKED(PCBS_DPLL_SLOWER_THAN_FMIN_MINUS_DELTA2_ERR_MASK); - SET_FIR_MASKED(PCBS_RESCLK_CSB_INSTR_VECTOR_CHG_IN_INVALID_STATE_ERR_MASK); - SET_FIR_MASKED(PCBS_RESLKC_BAND_BOUNDARY_CHG_IN_INVALID_STATE_ERR_MASK); - SET_FIR_MASKED(PCBS_OCC_HEARTBEAT_LOSS_ERR_MASK); - SET_FIR_MASKED(PCBS_SPARE39_ERR_MASK); - SET_FIR_MASKED(PCBS_SPARE40_ERR_MASK); - SET_FIR_MASKED(PCBS_SPARE41_ERR_MASK); - SET_FIR_MASKED(PCBS_SPARE42_ERR_MASK); - - - if(e_rc){rc.setEcmdError(e_rc); return rc;} - -// e_rc = mask.flushTo1(); -// if (e_rc) { FAPI_ERR("Bit operation failed. With rc = 0x%x", e_rc); rc.setEcmdError(e_rc); return rc; } - - - - // #--****************************************************************************** - // #-- Mask EX_PMErrMask_REG_0x100F010A - // #--****************************************************************************** - - - - rc = fapiGetChildChiplets(i_target, fapi::TARGET_TYPE_EX_CHIPLET, l_exChiplets, l_state); if (rc) return rc; - FAPI_DBG(" chiplet vector size => %u", l_exChiplets.size()); - - - - for (uint8_t c=0; c< l_exChiplets.size(); c++) { - FAPI_DBG("********* ******************* *********"); - FAPI_DBG("\t Loop Variable %d ",c); - FAPI_DBG("********* ******************* *********"); - - rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL, &l_exChiplets[c], l_functional); - if (rc) - { - FAPI_ERR("fapiGetAttribute of ATTR_FUNCTIONAL with rc = 0x%x", (uint32_t)rc); - return rc; - } - else - { - if (l_functional) + FAPI_INF("Executing proc_pm_pcbs_firinit ..."); + do + { + if (mode == PM_RESET) { - // The ex is functional let's build the SCOM address - rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &l_exChiplets[c], l_ex_number); - if (rc) - { - FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS with rc = 0x%x", (uint32_t)rc); - return rc; - } - - else - { - - FAPI_DBG("Core number = %d", l_ex_number); - // Use the l_ex_number to build the SCOM address; - rc = fapiPutScom(i_target, EX_PMErrMask_REG_0x100F010A + (l_ex_number * 0x01000000), mask ); - if (rc) { - FAPI_ERR("fapiPutScom(EX_PMErrMask_REG_0x100F010A) failed."); return rc; + e_rc = mask.flushTo0(); + e_rc |= mask.setBit(0,PCB_FIR_REGISTER_LENGTH); + if (e_rc) + { + rc.setEcmdError(e_rc); + break; } - - FAPI_INF("Done with current core %d ....\n", l_ex_number); - - } + + // #--*********************************************************** + // #-- Mask EX_PMErrMask_REG_0x100F010A + // #--*********************************************************** + + + + rc = fapiGetChildChiplets( i_target, + fapi::TARGET_TYPE_EX_CHIPLET, + l_exChiplets, + l_state); + if (rc) return rc; + FAPI_DBG(" chiplet vector size => %u", l_exChiplets.size()); + + + + for (uint8_t c=0; c< l_exChiplets.size(); c++) + { + rc = FAPI_ATTR_GET(ATTR_FUNCTIONAL, &l_exChiplets[c], l_functional); + if (rc) + { + FAPI_ERR("fapiGetAttribute of ATTR_FUNCTIONAL with rc = 0x%x", (uint32_t)rc); + break; + } + + if (l_functional) + { + // The ex is functional let's build the SCOM address + rc = FAPI_ATTR_GET( ATTR_CHIP_UNIT_POS, + &l_exChiplets[c], + l_ex_number); + if (rc) + { + FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS with rc = 0x%x", (uint32_t)rc); + break; + } + + FAPI_DBG("Core number = %d", l_ex_number); + // Use the l_ex_number to build the SCOM address; + rc = fapiPutScom( i_target, + EX_PMErrMask_REG_0x100F010A + + (l_ex_number * 0x01000000), + mask ); + if (rc) + { + FAPI_ERR("fapiPutScom(EX_PMErrMask_REG_0x100F010A) failed."); + break; + } + } // Functional + } // Chiplet loop } - else + else { - // EX is not functional - FAPI_DBG("Core number = %d is not functional", c); - } - } - - } + SET_FIR_MASKED(PCBS_SLEEP_ENTRY_NOTIFY_PMC_HANG_ERR_MASK); + SET_FIR_MASKED(PCBS_SLEEP_ENTRY_NOTIFY_PMC_ASSIST_HANG_ERR_MASK); + SET_FIR_MASKED(PCBS_SLEEP_ENTRY_NOTIFY_PMC_ERR_MASK); + SET_FIR_MASKED(PCBS_SLEEP_EXIT_INVOKE_PORE_ERR_MASK); + SET_FIR_MASKED(PCBS_WINKLE_ENTRY_NOTIFY_PMC_ERR_MASK); + SET_FIR_MASKED(PCBS_WINKLE_ENTRY_SEND_INT_ASSIST_ERR_MASK); + SET_FIR_MASKED(PCBS_WINKLE_EXIT_NOTIFY_PMC_ERR_MASK); + SET_FIR_MASKED(PCBS_WAIT_DPLL_LOCK_ERR_MASK); + SET_FIR_MASKED(PCBS_SPARE8_ERR_MASK); + SET_FIR_MASKED(PCBS_WINKLE_EXIT_SEND_INT_ASSIST_ERR_MASK); + SET_FIR_MASKED(PCBS_WINKLE_EXIT_SEND_INT_POWUP_ASSIST_ERR_MASK); + SET_FIR_MASKED(PCBS_WRITE_FSM_GOTO_REG_IN_INVALID_STATE_ERR_MASK); + SET_FIR_MASKED(PCBS_WRITE_PMGP0_IN_INVALID_STATE_ERR_MASK); + SET_FIR_MASKED(PCBS_FREQ_OVERFLOW_IN_PSTATE_MODE_ERR_MASK); + SET_FIR_MASKED(PCBS_ECO_RS_BYPASS_CONFUSION_ERR_MASK); + SET_FIR_MASKED(PCBS_CORE_RS_BYPASS_CONFUSION_ERR_MASK); + SET_FIR_MASKED(PCBS_READ_LPST_IN_PSTATE_MODE_ERR_MASK); + SET_FIR_MASKED(PCBS_LPST_READ_CORR_ERR_MASK); + SET_FIR_MASKED(PCBS_LPST_READ_UNCORR_ERR_MASK); + SET_FIR_MASKED(PCBS_PFET_STRENGTH_OVERFLOW_ERR_MASK); + SET_FIR_MASKED(PCBS_VDS_LOOKUP_ERR_MASK); + SET_FIR_MASKED(PCBS_IDLE_INTERRUPT_TIMEOUT_ERR_MASK); + SET_FIR_MASKED(PCBS_PSTATE_INTERRUPT_TIMEOUT_ERR_MASK); + SET_FIR_MASKED(PCBS_GLOBAL_ACTUAL_SYNC_INTERRUPT_TIMEOUT_ERR_MASK); + SET_FIR_MASKED(PCBS_PMAX_SYNC_INTERRUPT_TIMEOUT_ERR_MASK); + SET_FIR_MASKED(PCBS_GLOBAL_ACTUAL_PSTATE_PROTOCOL_ERR_MASK); + SET_FIR_MASKED(PCBS_PMAX_PROTOCOL_ERR_MASK); + SET_FIR_MASKED(PCBS_IVRM_GROSS_OR_FINE_ERR_MASK); + SET_FIR_MASKED(PCBS_IVRM_RANGE_ERR_MASK); + SET_FIR_MASKED(PCBS_DPLL_CPM_FMIN_ERR_MASK); + SET_FIR_MASKED(PCBS_DPLL_DCO_FULL_ERR_MASK); + SET_FIR_MASKED(PCBS_DPLL_DCO_EMPTY_ERR_MASK); + SET_FIR_MASKED(PCBS_DPLL_INT_ERR_MASK); + SET_FIR_MASKED(PCBS_FMIN_AND_NOT_CPMBIT_ERR_MASK); + SET_FIR_MASKED(PCBS_DPLL_FASTER_THAN_FMAX_PLUS_DELTA1_ERR_MASK); + SET_FIR_MASKED(PCBS_DPLL_SLOWER_THAN_FMIN_MINUS_DELTA2_ERR_MASK); + SET_FIR_MASKED(PCBS_RESCLK_CSB_INSTR_VECTOR_CHG_IN_INVALID_STATE_ERR_MASK); + SET_FIR_MASKED(PCBS_RESLKC_BAND_BOUNDARY_CHG_IN_INVALID_STATE_ERR_MASK); + SET_FIR_MASKED(PCBS_OCC_HEARTBEAT_LOSS_ERR_MASK); + SET_FIR_MASKED(PCBS_SPARE39_ERR_MASK); + SET_FIR_MASKED(PCBS_SPARE40_ERR_MASK); + SET_FIR_MASKED(PCBS_SPARE41_ERR_MASK); + SET_FIR_MASKED(PCBS_SPARE42_ERR_MASK); + + + if (e_rc) + { + rc.setEcmdError(e_rc); + break; + } + + // #--************************************************************ + // #-- Mask EX_PMErrMask_REG_0x100F010A + // #--************************************************************ + + rc = fapiGetChildChiplets( i_target, + fapi::TARGET_TYPE_EX_CHIPLET, + l_exChiplets, + l_state); + if (rc) + { + FAPI_ERR("fapiGetChildChiplets failed."); + break; + } + + FAPI_DBG(" chiplet vector size => %u", l_exChiplets.size()); + + for (uint8_t c=0; c< l_exChiplets.size(); c++) + { + rc = FAPI_ATTR_GET( ATTR_FUNCTIONAL, + &l_exChiplets[c], + l_functional); + if (rc) + { + FAPI_ERR("fapiGetAttribute of ATTR_FUNCTIONAL with rc = 0x%x", (uint32_t)rc); + break; + } + + if (l_functional) + { + // The ex is functional let's build the SCOM address + rc = FAPI_ATTR_GET( ATTR_CHIP_UNIT_POS, + &l_exChiplets[c], + l_ex_number); + if (rc) + { + FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS with rc = 0x%x", (uint32_t)rc); + break; + } + + FAPI_DBG("Core number = %d", l_ex_number); + // Use the l_ex_number to build the SCOM address; + rc = fapiPutScom( i_target, + EX_PMErrMask_REG_0x100F010A + + (l_ex_number * 0x01000000), + mask ); + if (rc) + { + FAPI_ERR("fapiPutScom(EX_PMErrMask_REG_0x100F010A) failed."); + break; + } + } // Functional + } // Chiplet loop + + // Exit if error detected + if (!rc.ok()) + { + break; + } + } // Mode - return rc ; - - -} // Procedure + } while(0); + return rc; -} //end extern C - +} // Procedure +} //end extern C |