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author | Mike Jones <mjjones@us.ibm.com> | 2011-10-26 14:59:19 -0500 |
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committer | MIKE J. JONES <mjjones@us.ibm.com> | 2011-11-01 12:14:11 -0500 |
commit | 5554e9d53859a91b39b01c8f789fe536e4688ecb (patch) | |
tree | 8f24ea04634c7aed7e34d7ce6a26326c0e954e8d /src/usr/hwas/test/hwasGardTest.H | |
parent | 14cd4e689a68a7440309090d0a6f82d25f8b6984 (diff) | |
download | talos-hostboot-5554e9d53859a91b39b01c8f789fe536e4688ecb.tar.gz talos-hostboot-5554e9d53859a91b39b01c8f789fe536e4688ecb.zip |
Initial Deconfigure and GARD support
Change-Id: I8448480627ad478e8e16377027137e6df410053f
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/460
Tested-by: Jenkins Server
Reviewed-by: MIKE J. JONES <mjjones@us.ibm.com>
Diffstat (limited to 'src/usr/hwas/test/hwasGardTest.H')
-rw-r--r-- | src/usr/hwas/test/hwasGardTest.H | 920 |
1 files changed, 920 insertions, 0 deletions
diff --git a/src/usr/hwas/test/hwasGardTest.H b/src/usr/hwas/test/hwasGardTest.H new file mode 100644 index 000000000..dda0de693 --- /dev/null +++ b/src/usr/hwas/test/hwasGardTest.H @@ -0,0 +1,920 @@ +// IBM_PROLOG_BEGIN_TAG +// This is an automatically generated prolog. +// +// $Source: src/usr/hwas/test/hwasGardTest.H $ +// +// IBM CONFIDENTIAL +// +// COPYRIGHT International Business Machines Corp. 2011 +// +// p1 +// +// Object Code Only (OCO) source materials +// Licensed Internal Code Source Materials +// IBM HostBoot Licensed Internal Code +// +// The source code for this program is not published or other- +// wise divested of its trade secrets, irrespective of what has +// been deposited with the U.S. Copyright Office. +// +// Origin: 30 +// +// IBM_PROLOG_END +#ifndef _HWASGARDTEST_H +#define _HWASGARDTEST_H + +/** + * @file hwasGardTest.H + * + * @brief Unit tests for HWAS Deconfigure and GARD functionality + */ + +//****************************************************************************** +// Includes +//****************************************************************************** + +// CXXTEST +#include <cxxtest/TestSuite.H> +#include <errl/errlmanager.H> +#include <targeting/targetservice.H> +#include <hwas/deconfigGard.H> +#include <hwas/hwas_reasoncodes.H> + +class HwasGardTest: public CxxTest::TestSuite +{ +public: + + /** + * @brief Test getting all Deconfigure Records + */ + void testDeconfigure1() + { + TS_TRACE(INFO_MRK "testDeconfigure1: Started"); + + errlHndl_t l_pErr = NULL; + HWAS::DeconfigGard::DeconfigureRecords_t l_records; + + // Get all Deconfigure Records + l_pErr = HWAS::theDeconfigGard().getDeconfigureRecords(NULL, l_records); + + if (l_pErr) + { + errlCommit(l_pErr); + TS_FAIL("testDeconfigure1: Error from getDeconfigureRecords"); + } + else + { + TS_TRACE(INFO_MRK "testDeconfigure1: Success. %d records", + l_records.size()); + } + } + + /** + * @brief Test getting a Deconfigure Record for a specific Target + */ + void testDeconfigure2() + { + TS_TRACE(INFO_MRK "testDeconfigure2: Started"); + + errlHndl_t l_pErr = NULL; + HWAS::DeconfigGard::DeconfigureRecords_t l_records; + + // Get the master processor chip + TARGETING::Target* l_pTarget = NULL; + TARGETING::targetService().masterProcChipTargetHandle(l_pTarget); + TARGETING::EntityPath l_id = + l_pTarget->getAttr<TARGETING::ATTR_PHYS_PATH>(); + + // Get any Deconfigure Record for the chip + l_pErr = HWAS::theDeconfigGard().getDeconfigureRecords(&l_id, + l_records); + + if (l_pErr) + { + errlCommit(l_pErr); + TS_FAIL("testDeconfigure2: Error from getDeconfigureRecords"); + } + else + { + if (l_records.size() > 1) + { + TS_FAIL("testDeconfigure2: More than 1 record (%d) for chip", + l_records.size()); + } + else + { + TS_TRACE(INFO_MRK "testDeconfigure2: Success. %d records", + l_records.size()); + } + } + } + + /** + * @brief Test Deconfiguring a Target, getting the Deconfigure Record and + * clearing the Deconfigure Record + */ + void testDeconfigure3() + { + TS_TRACE(INFO_MRK "testDeconfigure3: Started"); + + errlHndl_t l_pErr = NULL; + HWAS::DeconfigGard::DeconfigureRecords_t l_records; + + // Get the master processor chip + TARGETING::Target* l_pTarget = NULL; + TARGETING::targetService().masterProcChipTargetHandle(l_pTarget); + TARGETING::EntityPath l_id = + l_pTarget->getAttr<TARGETING::ATTR_PHYS_PATH>(); + + // Create an error log to pass to the deconfigureTarget function, this + // will never be committed. + errlHndl_t l_pNewErr = new ERRORLOG::ErrlEntry( + ERRORLOG::ERRL_SEV_UNRECOVERABLE, + HWAS::MOD_DECONFIG_GARD, + HWAS::RC_TARGET_NOT_DECONFIGURABLE); + + do + { + // Get any existing Deconfigure Record for the chip + l_pErr = HWAS::theDeconfigGard().getDeconfigureRecords(&l_id, + l_records); + + if (l_pErr) + { + TS_FAIL("testDeconfigure3: Error from getDeconfigureRecords"); + break; + } + + if (l_records.size() != 0) + { + TS_TRACE(INFO_MRK "testDeconfigure3: Chip has existing Deconfigure Record, skipping test"); + break; + } + + // Get the original HWAS_STATE of the chip + TARGETING::HwasState l_origState = + l_pTarget->getAttr<TARGETING::ATTR_HWAS_STATE>(); + + // Deconfigure the chip + l_pErr = HWAS::theDeconfigGard().deconfigureTarget(*l_pTarget, + l_pNewErr); + + if (l_pErr) + { + TS_FAIL("testDeconfigure3: Error from deconfigureTarget"); + break; + } + + // Get the new HWAS_STATE of the chip + TARGETING::HwasState l_state = + l_pTarget->getAttr<TARGETING::ATTR_HWAS_STATE>(); + + if (l_state.functional) + { + TS_FAIL("testDeconfigure3: Chip functional after deconfigure"); + // intentionally continue + } + + // Get the Deconfigure Record for the chip + l_pErr = HWAS::theDeconfigGard().getDeconfigureRecords(&l_id, + l_records); + + if (l_pErr) + { + TS_FAIL("testDeconfigure3: Error from getDeconfigureRecords (2)"); + break; + } + + if (l_records.size() != 1) + { + TS_FAIL("testDeconfigure3: %d records for chip, expected 1", + l_records.size()); + break; + } + + // Reset the HWAS_STATE of the chip + l_pTarget->setAttr<TARGETING::ATTR_HWAS_STATE>(l_origState); + + // Clear the Deconfigure Record + HWAS::theDeconfigGard()._clearDeconfigureRecords(&l_id); + + // Get the Deconfigure Record for the chip + l_records.clear(); + + l_pErr = HWAS::theDeconfigGard().getDeconfigureRecords(&l_id, + l_records); + + if (l_pErr) + { + TS_FAIL("testDeconfigure3: Error from getDeconfigureRecords (3)"); + break; + } + + if (l_records.size() != 0) + { + TS_FAIL("testDeconfigure3: %d records for chip, expected 0", + l_records.size()); + break; + } + + TS_TRACE(INFO_MRK "testDeconfigure3: Success"); + } + while (0); + + delete l_pNewErr; + l_pNewErr = NULL; + + if (l_pErr) + { + errlCommit(l_pErr); + } + } + + /** + * @brief Test Deconfiguring a Target multiple times + */ + void testDeconfigure4() + { + TS_TRACE(INFO_MRK "testDeconfigure4: Started"); + + errlHndl_t l_pErr = NULL; + HWAS::DeconfigGard::DeconfigureRecords_t l_records; + + // Get the master processor chip + TARGETING::Target* l_pTarget = NULL; + TARGETING::targetService().masterProcChipTargetHandle(l_pTarget); + TARGETING::EntityPath l_id = + l_pTarget->getAttr<TARGETING::ATTR_PHYS_PATH>(); + + // Create an error log to pass to the deconfigureTarget function, this + // will never be committed. + errlHndl_t l_pNewErr = new ERRORLOG::ErrlEntry( + ERRORLOG::ERRL_SEV_UNRECOVERABLE, + HWAS::MOD_DECONFIG_GARD, + HWAS::RC_TARGET_NOT_DECONFIGURABLE); + + do + { + // Get any existing Deconfigure Record for the chip + l_pErr = HWAS::theDeconfigGard().getDeconfigureRecords(&l_id, + l_records); + + if (l_pErr) + { + TS_FAIL("testDeconfigure4: Error from getDeconfigureRecords"); + break; + } + + if (l_records.size() != 0) + { + TS_TRACE(INFO_MRK "testDeconfigure4: Chip has existing Deconfigure Record, skipping test"); + break; + } + + // Get the current HWAS_STATE of the chip + TARGETING::HwasState l_origState = + l_pTarget->getAttr<TARGETING::ATTR_HWAS_STATE>(); + + // Deconfigure the chip + l_pErr = HWAS::theDeconfigGard().deconfigureTarget(*l_pTarget, + l_pNewErr); + + if (l_pErr) + { + TS_FAIL("testDeconfigure4: Error from deconfigureTarget"); + break; + } + + // Deconfigure the chip again + l_pErr = HWAS::theDeconfigGard().deconfigureTarget(*l_pTarget, + l_pNewErr); + + if (l_pErr) + { + TS_FAIL("testDeconfigure4: Error from deconfigureTarget (2)"); + break; + } + + // Get the new HWAS_STATE of the chip + TARGETING::HwasState l_state = + l_pTarget->getAttr<TARGETING::ATTR_HWAS_STATE>(); + + if (l_state.functional) + { + TS_FAIL("testDeconfigure4: Chip functional after deconfigure"); + // intentionally continue + } + + // Get the Deconfigure Record for the chip + l_pErr = HWAS::theDeconfigGard().getDeconfigureRecords(&l_id, + l_records); + + if (l_pErr) + { + TS_FAIL("testDeconfigure4: Error from getDeconfigureRecords (2)"); + break; + } + + // The second Deconfigure should not have created a new record + if (l_records.size() != 1) + { + TS_FAIL("testDeconfigure4: %d records for chip, expected 1", + l_records.size()); + break; + } + + // Reset the HWAS_STATE of the chip + l_pTarget->setAttr<TARGETING::ATTR_HWAS_STATE>(l_origState); + + // Clear the Deconfigure Record + HWAS::theDeconfigGard()._clearDeconfigureRecords(&l_id); + + TS_TRACE(INFO_MRK "testDeconfigure4: Success"); + } + while (0); + + delete l_pNewErr; + l_pNewErr = NULL; + + if (l_pErr) + { + errlCommit(l_pErr); + } + } + + /** + * @brief Test getting all GARD Records + */ + void testGard1() + { + TS_TRACE(INFO_MRK "testGard1: Started"); + + errlHndl_t l_pErr = NULL; + HWAS::DeconfigGard::GardRecords_t l_records; + + l_pErr = HWAS::theDeconfigGard().getGardRecords(0, l_records); + + if (l_pErr) + { + errlCommit(l_pErr); + TS_FAIL("testGard1: Error from getGardRecords"); + } + else + { + TS_TRACE(INFO_MRK "testGard1: Success. %d records", + l_records.size()); + } + } + + /** + * @brief Test getting GARD Records with a bad record ID). + */ + void testGard2() + { + TS_TRACE(INFO_MRK "testGard2: Started"); + + errlHndl_t l_pErr = NULL; + HWAS::DeconfigGard::GardRecords_t l_records; + + l_pErr = HWAS::theDeconfigGard().getGardRecords(0x12345678, l_records); + + if (l_pErr) + { + errlCommit(l_pErr); + TS_FAIL("testGard2: Error from getGardRecords"); + } + else + { + if (l_records.size()) + { + TS_FAIL("testGard2: %d records found for bad ID", + l_records.size()); + } + else + { + TS_TRACE(INFO_MRK "testGard2: Success"); + } + } + } + + /** + * @brief Test getting GARD Records for a specific target + */ + void testGard3() + { + TS_TRACE(INFO_MRK "testGard3: Started"); + + errlHndl_t l_pErr = NULL; + HWAS::DeconfigGard::GardRecords_t l_records; + + // Get the master processor chip + TARGETING::Target* l_pTarget = NULL; + TARGETING::targetService().masterProcChipTargetHandle(l_pTarget); + TARGETING::EntityPath l_id = + l_pTarget->getAttr<TARGETING::ATTR_PHYS_PATH>(); + + + // Get all GARD Records for the Target + l_pErr = HWAS::theDeconfigGard().getGardRecords(l_id, l_records); + + if (l_pErr) + { + errlCommit(l_pErr); + TS_FAIL("testGard3: Error from getGardRecords"); + } + else + { + TS_TRACE(INFO_MRK "testGard3: Success. %d records", + l_records.size()); + } + } + + /** + * @brief Test creating a GARD Record, getting the GARD Record and + * clearing the GARD Record + */ + void testGard4() + { + TS_TRACE(INFO_MRK "testGard4: Started"); + + errlHndl_t l_pErr = NULL; + HWAS::DeconfigGard::GardRecords_t l_records; + + // Get the master processor chip + TARGETING::Target* l_pTarget = NULL; + TARGETING::targetService().masterProcChipTargetHandle(l_pTarget); + TARGETING::EntityPath l_id = + l_pTarget->getAttr<TARGETING::ATTR_PHYS_PATH>(); + + // Create an error log to pass to the createGardRecord function, this + // will never be committed. + errlHndl_t l_pNewErr = new ERRORLOG::ErrlEntry( + ERRORLOG::ERRL_SEV_UNRECOVERABLE, + HWAS::MOD_DECONFIG_GARD, + HWAS::RC_TARGET_NOT_DECONFIGURABLE); + + do + { + // Get any existing GARD Records for the chip + l_pErr = HWAS::theDeconfigGard().getGardRecords(l_id, l_records); + + if (l_pErr) + { + TS_FAIL("testGard4: Error from getGardRecords"); + break; + } + + if (l_records.size() != 0) + { + TS_TRACE(INFO_MRK "testGard4: Chip has %d existing Gard Records, skipping test", + l_records.size()); + break; + } + + // Create a GARD Record for the chip + l_pErr = HWAS::theDeconfigGard(). + createGardRecord(*l_pTarget, l_pNewErr, + HWAS::DeconfigGard::GARD_SEVERITY_PREDICTIVE); + + if (l_pErr) + { + TS_FAIL("testGard4: Error from createGardRecord"); + break; + } + + // Get the GARD Records for the chip + l_pErr = HWAS::theDeconfigGard().getGardRecords(l_id, l_records); + + if (l_pErr) + { + TS_FAIL("testGard4: Error from getGardRecords (2)"); + break; + } + + if (l_records.size() != 1) + { + TS_FAIL("testGard4: %d records for chip, expected 1", + l_records.size()); + break; + } + + if (l_records[0].iv_severity != + HWAS::DeconfigGard::GARD_SEVERITY_PREDICTIVE) + { + TS_FAIL("testGard4: Record severity %d, expected predictive", + l_records[0].iv_severity); + break; + } + + // Clear the GARD Records for the chip + l_pErr = HWAS::theDeconfigGard().clearGardRecords(l_id); + + if (l_pErr) + { + TS_FAIL("testGard4: Error from clearGardRecords"); + break; + } + + // Get the GARD Records for the chip + l_records.clear(); + + l_pErr = HWAS::theDeconfigGard().getGardRecords(l_id, l_records); + + if (l_pErr) + { + TS_FAIL("testGard4: Error from getGardRecords (3)"); + break; + } + + if (l_records.size() != 0) + { + TS_FAIL("testGard4: %d records for chip, expected 0", + l_records.size()); + break; + } + + TS_TRACE(INFO_MRK "testGard4: Success"); + } + while (0); + + delete l_pNewErr; + l_pNewErr = NULL; + + if (l_pErr) + { + errlCommit(l_pErr); + } + } + + /** + * @brief Test creating a GARD Record for a Target multiple times + */ + void testGard5() + { + TS_TRACE(INFO_MRK "testGard5: Started"); + + errlHndl_t l_pErr = NULL; + HWAS::DeconfigGard::GardRecords_t l_records; + + // Get the master processor chip + TARGETING::Target* l_pTarget = NULL; + TARGETING::targetService().masterProcChipTargetHandle(l_pTarget); + TARGETING::EntityPath l_id = + l_pTarget->getAttr<TARGETING::ATTR_PHYS_PATH>(); + + // Create an error log to pass to the createGardRecord function, this + // will never be committed. + errlHndl_t l_pNewErr = new ERRORLOG::ErrlEntry( + ERRORLOG::ERRL_SEV_UNRECOVERABLE, + HWAS::MOD_DECONFIG_GARD, + HWAS::RC_TARGET_NOT_DECONFIGURABLE); + + do + { + // Get any existing GARD Records for the chip + l_pErr = HWAS::theDeconfigGard().getGardRecords(l_id, l_records); + + if (l_pErr) + { + TS_FAIL("testGard5: Error from getGardRecords"); + break; + } + + if (l_records.size() != 0) + { + TS_TRACE(INFO_MRK "testGard5: Chip has %d existing Gard Records, skipping test", + l_records.size()); + break; + } + + // Create a GARD Record for the chip + l_pErr = HWAS::theDeconfigGard(). + createGardRecord(*l_pTarget, l_pNewErr, + HWAS::DeconfigGard::GARD_SEVERITY_PREDICTIVE); + + if (l_pErr) + { + TS_FAIL("testGard5: Error from createGardRecord"); + break; + } + + // Create another GARD Record for the chip + l_pErr = HWAS::theDeconfigGard(). + createGardRecord(*l_pTarget, l_pNewErr, + HWAS::DeconfigGard::GARD_SEVERITY_FATAL); + + if (l_pErr) + { + TS_FAIL("testGard5: Error from createGardRecord (2)"); + break; + } + + // Get the GARD Records for the chip + l_pErr = HWAS::theDeconfigGard().getGardRecords(l_id, l_records); + + if (l_pErr) + { + TS_FAIL("testGard5: Error from getGardRecords (2)"); + break; + } + + if (l_records.size() != 2) + { + TS_FAIL("testGard5: %d records for chip, expected 2", + l_records.size()); + break; + } + + // Clear the GARD Records for the chip + l_pErr = HWAS::theDeconfigGard().clearGardRecords(l_id); + + if (l_pErr) + { + TS_FAIL("testGard5: Error from clearGardRecords"); + break; + } + + // Get the GARD Records for the chip + l_records.clear(); + + l_pErr = HWAS::theDeconfigGard().getGardRecords(l_id, l_records); + + if (l_pErr) + { + TS_FAIL("testGard5: Error from getGardRecords (3)"); + break; + } + + if (l_records.size() != 0) + { + TS_FAIL("testGard5: %d records for chip, expected 0", + l_records.size()); + break; + } + + TS_TRACE(INFO_MRK "testGard5: Success"); + } + while (0); + + delete l_pNewErr; + l_pNewErr = NULL; + + if (l_pErr) + { + errlCommit(l_pErr); + } + } + + /** + * @brief Test getting and clearing GARD Records by recordID + */ + void testGard6() + { + TS_TRACE(INFO_MRK "testGard6: Started"); + + errlHndl_t l_pErr = NULL; + HWAS::DeconfigGard::GardRecords_t l_records; + + // Get the master processor chip + TARGETING::Target* l_pTarget = NULL; + TARGETING::targetService().masterProcChipTargetHandle(l_pTarget); + TARGETING::EntityPath l_id = + l_pTarget->getAttr<TARGETING::ATTR_PHYS_PATH>(); + + // Create an error log to pass to the createGardRecord function, this + // will never be committed. + errlHndl_t l_pNewErr = new ERRORLOG::ErrlEntry( + ERRORLOG::ERRL_SEV_UNRECOVERABLE, + HWAS::MOD_DECONFIG_GARD, + HWAS::RC_TARGET_NOT_DECONFIGURABLE); + + do + { + // Get any existing GARD Records for the chip + l_pErr = HWAS::theDeconfigGard().getGardRecords(l_id, l_records); + + if (l_pErr) + { + TS_FAIL("testGard6: Error from getGardRecords"); + break; + } + + if (l_records.size() != 0) + { + TS_TRACE(INFO_MRK "testGard6: Chip has %d existing Gard Records, skipping test", + l_records.size()); + break; + } + + // Create a GARD Record for the chip + l_pErr = HWAS::theDeconfigGard(). + createGardRecord(*l_pTarget, l_pNewErr, + HWAS::DeconfigGard::GARD_SEVERITY_PREDICTIVE); + + if (l_pErr) + { + TS_FAIL("testGard6: Error from createGardRecord"); + break; + } + + // Create another GARD Record for the chip + l_pErr = HWAS::theDeconfigGard(). + createGardRecord(*l_pTarget, l_pNewErr, + HWAS::DeconfigGard::GARD_SEVERITY_FATAL); + + if (l_pErr) + { + TS_FAIL("testGard6: Error from createGardRecord (2)"); + break; + } + + // Get the GARD Records for the chip + l_pErr = HWAS::theDeconfigGard().getGardRecords(l_id, l_records); + + if (l_pErr) + { + TS_FAIL("testGard6: Error from getGardRecords (2)"); + break; + } + + if (l_records.size() != 2) + { + TS_FAIL("testGard6: %d records for chip, expected 2", + l_records.size()); + break; + } + + // Get the first GARD Record for the chip by Record ID + uint32_t l_recordID = l_records[0].iv_recordId; + l_records.clear(); + + l_pErr = HWAS::theDeconfigGard().getGardRecords(l_recordID, + l_records); + + if (l_pErr) + { + TS_FAIL("testGard6: Error from getGardRecords (3)"); + break; + } + + if (l_records.size() != 1) + { + TS_FAIL("testGard6: %d records for chip, expected 1", + l_records.size()); + break; + } + + // Clear the first GARD Record for the chip by Record ID + l_pErr = HWAS::theDeconfigGard().clearGardRecords(l_recordID); + + if (l_pErr) + { + TS_FAIL("testGard6: Error from clearGardRecords"); + break; + } + + // Get the GARD Records for the chip + l_records.clear(); + + l_pErr = HWAS::theDeconfigGard().getGardRecords(l_id, l_records); + + if (l_pErr) + { + TS_FAIL("testGard6: Error from getGardRecords (4)"); + break; + } + + if (l_records.size() != 1) + { + TS_FAIL("testGard6: %d records for chip, expected 1 (2)", + l_records.size()); + break; + } + + // Clear the GARD Records for the chip + l_pErr = HWAS::theDeconfigGard().clearGardRecords(l_id); + + if (l_pErr) + { + TS_FAIL("testGard6: Error from clearGardRecords"); + break; + } + + TS_TRACE(INFO_MRK "testGard6: Success"); + } + while (0); + + delete l_pNewErr; + l_pNewErr = NULL; + + if (l_pErr) + { + errlCommit(l_pErr); + } + } + + /** + * @brief Test getting and clearing all GARD Records + */ + void testGard7() + { + TS_TRACE(INFO_MRK "testGard7: Started"); + + errlHndl_t l_pErr = NULL; + HWAS::DeconfigGard::GardRecords_t l_records; + + // Get the master processor chip + TARGETING::Target* l_pTarget = NULL; + TARGETING::targetService().masterProcChipTargetHandle(l_pTarget); + TARGETING::EntityPath l_id = + l_pTarget->getAttr<TARGETING::ATTR_PHYS_PATH>(); + + // Create an error log to pass to the createGardRecord function, this + // will never be committed. + errlHndl_t l_pNewErr = new ERRORLOG::ErrlEntry( + ERRORLOG::ERRL_SEV_UNRECOVERABLE, + HWAS::MOD_DECONFIG_GARD, + HWAS::RC_TARGET_NOT_DECONFIGURABLE); + + do + { + // Get all existing GARD Records + l_pErr = HWAS::theDeconfigGard().getGardRecords(0, l_records); + + if (l_pErr) + { + TS_FAIL("testGard7: Error from getGardRecords"); + break; + } + + if (l_records.size() != 0) + { + TS_TRACE(INFO_MRK "testGard7: %d existing Gard Records, skipping test", + l_records.size()); + break; + } + + // Create a GARD Record for the chip + l_pErr = HWAS::theDeconfigGard(). + createGardRecord(*l_pTarget, l_pNewErr, + HWAS::DeconfigGard::GARD_SEVERITY_PREDICTIVE); + + if (l_pErr) + { + TS_FAIL("testGard7: Error from createGardRecord"); + break; + } + + // Create another GARD Record for the chip + l_pErr = HWAS::theDeconfigGard(). + createGardRecord(*l_pTarget, l_pNewErr, + HWAS::DeconfigGard::GARD_SEVERITY_FATAL); + + if (l_pErr) + { + TS_FAIL("testGard7: Error from createGardRecord (2)"); + break; + } + + // Clear all GARD Records + l_pErr = HWAS::theDeconfigGard().clearGardRecords(0); + + if (l_pErr) + { + TS_FAIL("testGard7: Error from clearGardRecords"); + break; + } + + // Get the GARD Records + l_records.clear(); + + l_pErr = HWAS::theDeconfigGard().getGardRecords(0, l_records); + + if (l_pErr) + { + TS_FAIL("testGard7: Error from getGardRecords (2)"); + break; + } + + if (l_records.size() != 0) + { + TS_FAIL("testGard7: %d records for chip, expected 0", + l_records.size()); + break; + } + + TS_TRACE(INFO_MRK "testGard7: Success"); + } + while (0); + + delete l_pNewErr; + l_pNewErr = NULL; + + if (l_pErr) + { + errlCommit(l_pErr); + } + } +}; + +#endif |