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authorBrian Horton <brianh@linux.ibm.com>2012-03-14 15:20:55 -0500
committerA. Patrick Williams III <iawillia@us.ibm.com>2012-04-05 08:12:31 -0500
commitd26e75088c24cdf95e02575b0d172068cdb1a58b (patch)
treefdce985cc154c767aed76503e73bffbad3ed8e5c /src/usr/hwas/plat/hwasPlat.C
parent3f745dd4998f42e82fecadd4bcdd7e5662ad6b01 (diff)
downloadtalos-hostboot-d26e75088c24cdf95e02575b0d172068cdb1a58b.tar.gz
talos-hostboot-d26e75088c24cdf95e02575b0d172068cdb1a58b.zip
Updates to HWAS code: istep 6, presence detect logic
. remove hwas functions in istep 4.* . add new hwas functions to istep 6.* as per 0.99 ipl flow . split hwas into common and platform specific layers for hostboot/fsp sharing . add presence detect logic . add chip id/ec logic, including ATTR_CHIP_ID (Story 35542) Change-Id: I436fe54b1a7f7547cbc9e19beda2d47105c11871 RTC: 35777 RTC: 35542 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/800 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr/hwas/plat/hwasPlat.C')
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1 files changed, 214 insertions, 0 deletions
diff --git a/src/usr/hwas/plat/hwasPlat.C b/src/usr/hwas/plat/hwasPlat.C
new file mode 100644
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+// IBM_PROLOG_BEGIN_TAG
+// This is an automatically generated prolog.
+//
+// $Source: src/usr/hwas/plat/hwasPlat.C $
+//
+// IBM CONFIDENTIAL
+//
+// COPYRIGHT International Business Machines Corp. 2012
+//
+// p1
+//
+// Object Code Only (OCO) source materials
+// Licensed Internal Code Source Materials
+// IBM HostBoot Licensed Internal Code
+//
+// The source code for this program is not published or other-
+// wise divested of its trade secrets, irrespective of what has
+// been deposited with the U.S. Copyright Office.
+//
+// Origin: 30
+//
+// IBM_PROLOG_END
+/**
+ * @file hwasPlat.C
+ *
+ * @brief Platform specifics
+ */
+
+#include <hwas/hwas.H>
+#include <hwas/hwasCommon.H>
+
+#include <devicefw/driverif.H>
+
+// trace setup; used by HWAS_DBG and HWAS_ERR macros
+trace_desc_t *g_trac_dbg_hwas = NULL; // debug - fast
+trace_desc_t *g_trac_imp_hwas = NULL; // important - slow
+
+TRAC_INIT(&g_trac_dbg_hwas, "HWAS", 2048 );
+TRAC_INIT(&g_trac_imp_hwas, "HWAS_I", 2048 );
+
+namespace HWAS
+{
+
+using namespace TARGETING;
+
+uint64_t target_to_uint64(const Target* i_target);
+
+//******************************************************************************
+// platReadIDEC function
+//******************************************************************************
+errlHndl_t platReadIDEC(const TargetHandleList &i_targets)
+{
+ errlHndl_t errl = NULL;
+
+ // we have to handle the master processor chip special, so figure
+ // out what it is first
+ Target* pMasterProc = NULL;
+ targetService().masterProcChipTargetHandle(pMasterProc);
+
+ // we got a list of targets - read the ID/EC for eacn
+ // and update the appropriate ATTR_ fields.
+ for (TargetHandleList::const_iterator pTarget_it = i_targets.begin();
+ pTarget_it != i_targets.end();
+ pTarget_it++)
+ {
+ TargetHandle_t pTarget = *pTarget_it;
+
+ if (pTarget == pMasterProc)
+ {
+ // we have to handle this special and first. issue is that we can't
+ // do a deviceRead of an FSI address on 'ourselves'. so, if the
+ // target is the master proccessor, which is where we are running,
+ // then we need to do the deviceRead of the SCOM address.
+ uint64_t id_ec;
+ size_t op_size = sizeof(id_ec);
+ errl = DeviceFW::deviceRead(pTarget, &id_ec,
+ op_size, DEVICE_SCOM_ADDRESS(0x000F000Full));
+
+ if (errl == NULL)
+ { // no error, so we got a valid ID/EC value back
+ // EC - nibbles 0,2
+ // 01234567
+ uint8_t ec = (((id_ec & 0xF000000000000000ull) >> 56) |
+ ((id_ec & 0x00F0000000000000ull) >> 52));
+ pTarget->setAttr<ATTR_EC>(ec);
+
+ // ID - nibbles 1,5,3,4
+ // 01234567
+ uint32_t id = (((id_ec & 0x0F00000000000000ull) >> 44) |
+ ((id_ec & 0x00000F0000000000ull) >> 32) |
+ ((id_ec & 0x000F000000000000ull) >> 44) |
+ ((id_ec & 0x0000F00000000000ull) >> 44));
+ pTarget->setAttr<ATTR_CHIP_ID>(id);
+ HWAS_DBG( "pTarget %x (%p) id %x ec %x",
+ target_to_uint64(pTarget), pTarget, id, ec);
+ }
+ else
+ { // errl was set - this is an error condition.
+ HWAS_ERR( "pTarget %x (%p) %x/%x - failed ID/EC read",
+ target_to_uint64(pTarget), pTarget,
+ pTarget->getAttr<ATTR_CLASS>(),
+ pTarget->getAttr<ATTR_TYPE>());
+
+ // break out so that we can return an error
+ break;
+ }
+ } else if (pTarget->getAttr<ATTR_CLASS>() == CLASS_CHIP)
+ { // CLASS_CHIP only
+ uint32_t id_ec;
+ size_t op_size = sizeof(id_ec);
+ errl = DeviceFW::deviceRead(pTarget, &id_ec,
+ op_size, DEVICE_FSI_ADDRESS(0x1028));
+
+ if (errl == NULL)
+ { // no error, so we got a valid ID/EC value back
+ // EC - nibbles 0,2
+ // 01234567
+ uint8_t ec = (((id_ec & 0xF0000000) >> 24) |
+ ((id_ec & 0x00F00000) >> 20));
+ pTarget->setAttr<ATTR_EC>(ec);
+
+ // ID - nibbles 1,5,3,4
+ // 01234567
+ uint32_t id = (((id_ec & 0x0F000000) >> 12) |
+ ((id_ec & 0x00000F00) >> 0) |
+ ((id_ec & 0x000F0000) >> 12) |
+ ((id_ec & 0x0000F000) >> 12));
+ pTarget->setAttr<ATTR_CHIP_ID>(id);
+ HWAS_DBG( "pTarget %x (%p) id %x ec %x",
+ target_to_uint64(pTarget), pTarget, id, ec);
+ }
+ else
+ { // errl was set - this is an error condition.
+ HWAS_ERR( "pTarget %x (%p) %x/%x - failed ID/EC read",
+ target_to_uint64(pTarget), pTarget,
+ pTarget->getAttr<ATTR_CLASS>(),
+ pTarget->getAttr<ATTR_TYPE>());
+
+ // break out so that we can return an error
+ break;
+ }
+ }
+ else
+ { // skipping - no ID/EC on this target
+ HWAS_DBG( "pTarget %x (%p) %x/%x - skipping",
+ target_to_uint64(pTarget), pTarget,
+ pTarget->getAttr<ATTR_CLASS>(),
+ pTarget->getAttr<ATTR_TYPE>());
+ }
+ } // for pTarget_it
+
+ return errl;
+} // platReadIDEC
+
+//******************************************************************************
+// platPresenceDetect function
+//******************************************************************************
+errlHndl_t platPresenceDetect(TargetHandleList &io_targets)
+{
+ errlHndl_t errl = NULL;
+
+ // we got a list of targets - determine if they are present
+ // if not, delete them from the list
+ for (TargetHandleList::iterator pTarget_it = io_targets.begin();
+ pTarget_it != io_targets.end();
+ ) // increment will be done in the loop below
+ {
+ TargetHandle_t pTarget = *pTarget_it;
+
+ // call deviceRead() to see if they are present
+ bool present = false;
+ size_t presentSize = sizeof(present);
+ errl = deviceRead(pTarget, &present, presentSize,
+ DEVICE_PRESENT_ADDRESS());
+
+ if (errl == NULL)
+ { // no error, so we got a valid present value back
+ if (present == true)
+ {
+ HWAS_DBG( "io_targets %x (%p) %x/%x - detected present",
+ target_to_uint64(pTarget), pTarget,
+ pTarget->getAttr<ATTR_CLASS>(),
+ pTarget->getAttr<ATTR_TYPE>());
+
+ // advance to next entry in the list
+ pTarget_it++;
+ }
+ else
+ { // chip no present -- remove from list
+ HWAS_DBG( "io_targets %x (%p) %x/%x - no presence",
+ target_to_uint64(pTarget), pTarget,
+ pTarget->getAttr<ATTR_CLASS>(),
+ pTarget->getAttr<ATTR_TYPE>());
+
+ // erase this target, and 'increment' to next
+ pTarget_it = io_targets.erase(pTarget_it);
+ }
+ }
+ else
+ { // errl was set - this is an error condition.
+ HWAS_ERR( "io_targets %x (%p) %x/%x - failed presence detect",
+ target_to_uint64(pTarget), pTarget,
+ pTarget->getAttr<ATTR_CLASS>(),
+ pTarget->getAttr<ATTR_TYPE>());
+
+ // break out so that we can return an error
+ break;
+ }
+ } // for pTarget_it
+
+ return errl;
+} // platPresenceDetect
+
+} // namespace HWAS
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