PRD: Centaur, Murano RAS Spreadsheet DD2 update

Change-Id: I55ab76bf195ac97e4642debd0b5221962e552217
Squashed: Ife87a95934e71d283bd13432c0a5a0f889ee8b13
RTC:94873
CQ:SW253223
Backport: release-fips810
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/9091
Tested-by: Jenkins Server
Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com>
Reviewed-by: Christopher T. Phan <cphan@us.ibm.com>
Reviewed-by: Zane Shelley <zshelle@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/10303
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

7 files changed, 310 insertions, 46 deletions

diff --git a/src/usr/diag/prdf/common/plat/pegasus/Mba.rule b/src/usr/diag/prdf/common/plat/pegasus/Mba.rule
index f8803aa30..40a2187ca 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/Mba.rule
+++ b/src/usr/diag/prdf/common/plat/pegasus/Mba.rule
@@ -491,17 +491,23 @@ group gMbaFir filter singlebit
     /** MBAFIR[6]
      *  MBAFIRQ_CHANNEL_CHKSTP_ERR
      */
-    (MbaFir, bit(6)) ? SelfMedThr1UE;
+    (MbaFir, bit(6)) ? SelfMedThr1;
 
     /** MBAFIR[7]
      *  MBAFIRQ_WRD_CAW2_DATA_CE_UE_ERR
      */
-    (MbaFir, bit(7)) ? SelfMedThr1UE;
+    (MbaFir, bit(7)) ? SelfMedThr1;
 
-    /** MBAFIR[8:14]
+    # This is for DD2 only
+    /** MBAFIR[8]
+     *  MBAFIRQ_MAINT_1HOT_ST_ERROR_DD2
+     */
+    (MbaFir, bit(8)) ? SelfMedThr1;
+
+    /** MBAFIR[9:14]
      *  Reserved
      */
-    (MbaFir, bit(8|9|10|11|12|13|14)) ? defaultMaskedError;
+    (MbaFir, bit(9|10|11|12|13|14)) ? defaultMaskedError;
 
     /** MBAFIR[15]
      *  MBAFIRQ_INTERNAL_SCOM_ERROR
@@ -530,32 +536,32 @@ group gMbaSecureFir filter singlebit
     /** MBASECUREFIR[0]
      *  MBASIRQ_INVALID_MBA_CAL0Q_ACCESS
      */
-    (MbaSecureFir, bit(0)) ? callout2ndLvlMedThr1UE_NoGard;
+    (MbaSecureFir, bit(0)) ? callout2ndLvlDumpShNoGard;
 
     /** MBASECUREFIR[1]
      *  MBASIRQ_INVALID_MBA_CAL1Q_ACCESS
      */
-    (MbaSecureFir, bit(1)) ? callout2ndLvlMedThr1UE_NoGard;
+    (MbaSecureFir, bit(1)) ? callout2ndLvlDumpShNoGard;
 
     /** MBASECUREFIR[2]
      *  MBASIRQ_INVALID_MBA_CAL2Q_ACCESS
      */
-    (MbaSecureFir, bit(2)) ? callout2ndLvlMedThr1UE_NoGard;
+    (MbaSecureFir, bit(2)) ? callout2ndLvlDumpShNoGard;
 
     /** MBASECUREFIR[3]
      *  MBASIRQ_INVALID_MBA_CAL3Q_ACCESS
      */
-    (MbaSecureFir, bit(3)) ? callout2ndLvlMedThr1UE_NoGard;
+    (MbaSecureFir, bit(3)) ? callout2ndLvlDumpShNoGard;
 
     /** MBASECUREFIR[4]
      *  MBASIRQ_INVALID_DDR_CONFIG_REG_ACCESS
      */
-    (MbaSecureFir, bit(4)) ? callout2ndLvlMedThr1UE_NoGard;
+    (MbaSecureFir, bit(4)) ? callout2ndLvlDumpShNoGard;
 
     /** MBASECUREFIR[5]
      *  MBASIRQ_INVALID_SIR_MASK_OR_ACTION_REGISTER_ACCESS
      */
-    (MbaSecureFir, bit(5)) ? callout2ndLvlMedThr1UE_NoGard;
+    (MbaSecureFir, bit(5)) ? callout2ndLvlDumpShNoGard;
 };
 
 ################################################################################
@@ -577,12 +583,12 @@ group gMbaDdrPhyFir filter singlebit
     /** MBADDRPHYFIR[48]
      *  PHY01_DDRPHY_FIR_REG_DDR0_FSM_CKSTP
      */
-    (MbaDdrPhyFir, bit(48)) ? SelfMedThr1UE;
+    (MbaDdrPhyFir, bit(48)) ? SelfMedThr1;
 
     /** MBADDRPHYFIR[49]
      *  PHY01_DDRPHY_FIR_REG_DDR0_PARITY_CKSTP
      */
-    (MbaDdrPhyFir, bit(49)) ? SelfMedThr1UE;
+    (MbaDdrPhyFir, bit(49)) ? SelfMedThr1;
 
     /** MBADDRPHYFIR[50]
      *  PHY01_DDRPHY_FIR_REG_DDR0_CALIBRATION_ERROR
@@ -612,12 +618,12 @@ group gMbaDdrPhyFir filter singlebit
     /** MBADDRPHYFIR[56]
      *  PHY01_DDRPHY_FIR_REG_DDR1_FSM_CKSTP
      */
-    (MbaDdrPhyFir, bit(56)) ? SelfMedThr1UE;
+    (MbaDdrPhyFir, bit(56)) ? SelfMedThr1;
 
     /** MBADDRPHYFIR[57]
      *  PHY01_DDRPHY_FIR_REG_DDR1_PARITY_CKSTP
      */
-    (MbaDdrPhyFir, bit(57)) ? SelfMedThr1UE;
+    (MbaDdrPhyFir, bit(57)) ? SelfMedThr1;
 
     /** MBADDRPHYFIR[58]
      *  PHY01_DDRPHY_FIR_REG_DDR1_CALIBRATION_ERROR
@@ -657,7 +663,7 @@ group gMbaCalFir filter singlebit
     /** MBACALFIR[1]
      *  MBACALFIRQ_MBA_NONRECOVERABLE_ERROR
      */
-    (MbaCalFir, bit(1)) ? SelfMedThr1UE;
+    (MbaCalFir, bit(1)) ? SelfMedThr1;
 
     /** MBACALFIR[2]
      *  MBACALFIRQ_REFRESH_OVERRUN
@@ -692,12 +698,12 @@ group gMbaCalFir filter singlebit
     /** MBACALFIR[8]
      *  MBACALFIRQ_MBX_TO_MBA_PAR_ERROR
      */
-    (MbaCalFir, bit(8)) ? SelfMedThr1UE;
+    (MbaCalFir, bit(8)) ? SelfMedThr1;
 
     /** MBACALFIR[9]
      *  MBACALFIRQ_MBA_WRD_UE
      */
-    (MbaCalFir, bit(9)) ? SelfMedThr1UE;
+    (MbaCalFir, bit(9)) ? SelfMedThr1;
 
     /** MBACALFIR[10]
      *  MBACALFIRQ_MBA_WRD_CE
@@ -707,7 +713,7 @@ group gMbaCalFir filter singlebit
     /** MBACALFIR[11]
      *  MBACALFIRQ_MBA_MAINT_UE
      */
-    (MbaCalFir, bit(11)) ? SelfMedThr1UE;
+    (MbaCalFir, bit(11)) ? SelfMedThr1;
 
     /** MBACALFIR[12]
      *  MBACALFIRQ_MBA_MAINT_CE
@@ -717,7 +723,7 @@ group gMbaCalFir filter singlebit
     /** MBACALFIR[13]
      *  MBACALFIRQ_DDR_CAL_RESET_TIMEOUT
      */
-    (MbaCalFir, bit(13)) ? SelfMedThr1UE;
+    (MbaCalFir, bit(13)) ? SelfMedThr1;
 
     /** MBACALFIR[14]
      *  MBACALFIRQ_WRQ_DATA_CE
@@ -727,7 +733,7 @@ group gMbaCalFir filter singlebit
     /** MBACALFIR[15]
      *  MBACALFIRQ_WRQ_DATA_UE
      */
-    (MbaCalFir, bit(15)) ? SelfMedThr1UE;
+    (MbaCalFir, bit(15)) ? SelfMedThr1;
 
     /** MBACALFIR[16]
      *  MBACALFIRQ_WRQ_DATA_SUE
@@ -750,14 +756,38 @@ group gMbaCalFir filter singlebit
     (MbaCalFir, bit(19)) ? thresholdAndMask_self;
 
     /** MBACALFIR[20]
-     *  MBACALFIRQ_INTERNAL_SCOM_ERROR
+     *  DD1: MBACALFIRQ_INTERNAL_SCOM_ERROR
      */
-    (MbaCalFir, bit(20)) ? thresholdAndMask_self;
+    (MbaCalFir, bit(20)) ? thresholdAndMask_self; # DD1 action, masked for DD2+
 
     /** MBACALFIR[21]
+     *  DD1: MBACALFIRQ_INTERNAL_SCOM_ERROR_COPY
+     */
+    (MbaCalFir, bit(21)) ? thresholdAndMask_self; # DD1 action, masked for DD2+
+
+    # This is for DD2 only
+    /** MBACALFIR[22]
+     *  MBACALFIRQ_RHMR_SEC_ALREADY_FULL
+     */
+    (MbaCalFir, bit(22)) ? defaultMaskedError;
+
+    # This is for DD2 only
+    /** MBACALFIR[23]
+     *  Reserved
+     */
+    (MbaCalFir, bit(23)) ? defaultMaskedError;
+
+    # This is for DD2 only
+    /** MBACALFIR[24]
+     *  MBACALFIRQ_INTERNAL_SCOM_ERROR
+     */
+    (MbaCalFir, bit(24)) ? thresholdAndMask_self;
+
+    # This is for DD2 only
+    /** MBACALFIR[25]
      *  MBACALFIRQ_INTERNAL_SCOM_ERROR_COPY
      */
-    (MbaCalFir, bit(21)) ? thresholdAndMask_self;
+    (MbaCalFir, bit(25)) ? thresholdAndMask_self;
 };
 
 ###############################################################################
diff --git a/src/usr/diag/prdf/common/plat/pegasus/Mcs.rule b/src/usr/diag/prdf/common/plat/pegasus/Mcs.rule
index ba8a49c11..155d4f0ef 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/Mcs.rule
+++ b/src/usr/diag/prdf/common/plat/pegasus/Mcs.rule
@@ -50,6 +50,8 @@ chip Mcs
     dump        DUMP_CONTENT_HW;
     scomlen     64;
 
+.include "prdfP8McsExtraSig.H";
+
  #############################################################################
  #                                                                           #
  #  ######                                                                   #
@@ -330,7 +332,7 @@ group gMciFir attntype CHECK_STOP, RECOVERABLE, SPECIAL, UNIT_CS
     /** MCIFIR[27]
      *  MCIFIRQ_MCS_COMMAND_LIST_TIMEOUT_DUE_TO_POWERBUS
      */
-    (MciFir, bit(27)) ? callout2ndLvlDumpShNoGard;
+    (MciFir, bit(27)) ? calloutDmiBusAndLvl2Th1;
 
     /** MCIFIR[28]
      *  MCIFIRQ_MULTIPLE_RCMD_OR_CRESP_ACTIVE
@@ -415,10 +417,20 @@ group gMciFir attntype CHECK_STOP, RECOVERABLE, SPECIAL, UNIT_CS
      */
     (MciFir, bit(43)) ? defaultMaskedError;
 
-    /** MCIFIR[44|45|46]
-     *  Reserved
+    /** MCIFIR[44]
+     *  MCIFIRQ_COMMAND_AND_LIST_TIMEOUT
+     */
+    (MciFir, bit(44)) ? defaultMaskedError;
+
+    /** MCIFIR[45]
+     *  MCIFIRQ_MPIPL_OR_FLR_WRITE_SUE
      */
-    (MciFir, bit(44|45|46)) ? defaultMaskedError;
+    (MciFir, bit(45)) ? defaultMaskedError;
+
+    /** MCIFIR[46]
+     *  MCIFIRQ_INVALID_CENTAUR_BYPASS
+     */
+    (MciFir, bit(46)) ? calloutDmiBusSelfLowConnHigh;
 
     /** MCIFIR[47]
      *  MCS WRITE DATAFLOW SUE
@@ -426,19 +438,34 @@ group gMciFir attntype CHECK_STOP, RECOVERABLE, SPECIAL, UNIT_CS
     (MciFir, bit(47)) ? defaultMaskedError;
 
     /** MCIFIR[48]
-     *  MCIFIRQ_INTERNAL_SCOM_ERROR
+     *  MCIFIRQ_BAD_MDI0_UPDATE
      */
-    (MciFir, bit(48)) ? thresholdAndMask_self;
+    (MciFir, bit(48)) ? mcifirBit48;
 
     /** MCIFIR[49]
+     *  MCIFIRQ_INCONSISTENT_SF_STAT
+     */
+    (MciFir, bit(49)) ? mcifirBit49;
+
+    /** MCIFIR[50:51]
+     *  RESERVED
+     */
+    (MciFir, bit(50|51)) ? defaultMaskedError;
+
+    /** MCIFIR[52]
+     *  MCIFIRQ_INTERNAL_SCOM_ERROR
+     */
+    (MciFir, bit(52)) ? defaultMaskedError;
+
+    /** MCIFIR[53]
      *  MCIFIRQ_INTERNAL_SCOM_ERROR_CLONE
      */
-    (MciFir, bit(49)) ? thresholdAndMask_self;
+    (MciFir, bit(53)) ? defaultMaskedError;
 
-    /** MCIFIR[50:63]
+    /** MCIFIR[54:63]
      *  RESERVED
      */
-    (MciFir, bit( 50|51|52|53|54|55|56|57|58|59|
+    (MciFir, bit( 54|55|56|57|58|59|
                   60|61|62|63 )) ? defaultMaskedError;
 
 };
@@ -511,3 +538,30 @@ actionclass analyzeSpareBitAndThr
 {
     try( funccall("checkSpareBit"), CalloutDmiBusAndThr2pd );
 };
+
+/** The plugin checks if the Proc is either Murano DD2 or Venice DD1.
+    If neither, then callout thresholdAndMask_self and change signature to
+    DD1: MCIFIRQ_INTERNAL_SCOM_ERROR. */
+actionclass mcifirBit48
+{
+    threshold32pday;
+    try( funccall("dd1mcifirBit48"), calloutDmiBusSelfLowConnHigh );
+};
+
+/** The plugin checks if the Proc is either Murano DD2 or Venice DD1.
+    If neither, then callout thresholdAndMask_self and change signature to
+    DD1: MCIFIRQ_INTERNAL_SCOM_ERROR_CLONE. */
+actionclass mcifirBit49
+{
+    threshold32pday;
+    try( funccall("dd1mcifirBit49"), calloutDmiBusSelfLowConnHigh );
+};
+
+/** Callout MCS Low and Centaur High */
+actionclass calloutDmiBusSelfLowConnHigh
+{
+    calloutSelfLow;
+    callout(connected(TYPE_MEMBUF), MRU_HIGH);
+    calloutDmiBusSymFru;
+    threshold1;
+};
diff --git a/src/usr/diag/prdf/common/plat/pegasus/Membuf_acts_NEST.rule b/src/usr/diag/prdf/common/plat/pegasus/Membuf_acts_NEST.rule
index 3581a4d3d..1f51bf813 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/Membuf_acts_NEST.rule
+++ b/src/usr/diag/prdf/common/plat/pegasus/Membuf_acts_NEST.rule
@@ -210,7 +210,7 @@ group gDmiFir filter singlebit
     /** DMIFIR[12]
      *  Too Many Bus Errors
      */
-    (DmiFir, bit(12)) ? thresholdAndMask_dmiBus;
+    (DmiFir, bit(12)) ? calloutDmiBusTh1;
 
     /** DMIFIR[13:15]
      *  Reserved
@@ -514,7 +514,7 @@ group gMbiFir filter singlebit
     /** MBIFIR[18]
      *  MBIFIRQ_MULTIPLE_REPLAY
      */
-    (MbiFir, bit(18)) ? thresholdAndMask_dmiBus;
+    (MbiFir, bit(18)) ? defaultMaskedError;
 
     /** MBIFIR[19]
      *  MBIFIRQ_MBICFG_PARITY_SCOM_ERROR
@@ -526,10 +526,16 @@ group gMbiFir filter singlebit
      */
     (MbiFir, bit(20)) ? calloutDmiBusTh1UE;
 
-    /** MBIFIR[21:24]
+    # This is for DD2 only
+    /** MBIFIR[21]
+     *  MBIFIRQ_WAT_ERROR
+     */
+    (MbiFir, bit(21)) ? defaultMaskedError;
+
+    /** MBIFIR[22:24]
      *  Reserved
      */
-    (MbiFir, bit(21|22|23|24)) ? defaultMaskedError;
+    (MbiFir, bit(22|23|24)) ? defaultMaskedError;
 
     /** MBIFIR[25]
      *  MBIFIRQ_INTERNAL_SCOM_ERROR_CLONE
@@ -701,14 +707,38 @@ group gMbsFir filter singlebit
     (MbsFir, bit(28)) ? defaultMaskedError;
 
     /** MBSFIR[29]
-     *  MBS_FIR_REG_INTERNAL_SCOM_ERROR
+     *  DD1: MBS_FIR_REG_INTERNAL_SCOM_ERROR
      */
-    (MbsFir, bit(29)) ? thresholdAndMask_self;
+    (MbsFir, bit(29)) ? thresholdAndMask_self; # DD1 action, masked for DD2+
 
     /** MBSFIR[30]
+     *  MBS_FIR_REG_PROXIMAL_CE_UE
+     */
+    (MbsFir, bit(30)) ? mbsfirBit30;
+
+    # This is for DD2 only
+    /** MBSFIR[31]
+     *  MBS_FIR_REG_SPARE_FIR31
+     */
+    (MbsFir, bit(31)) ? defaultMaskedError;
+
+    # This is for DD2 only
+    /** MBSFIR[32]
+     *  MBS_FIR_REG_SPARE_FIR32
+     */
+    (MbsFir, bit(32)) ? defaultMaskedError;
+
+    # This is for DD2 only
+    /** MBSFIR[33]
+     *  MBS_FIR_REG_INTERNAL_SCOM_ERROR
+     */
+    (MbsFir, bit(33)) ? thresholdAndMask_self;
+
+    # This is for DD2 only
+    /** MBSFIR[34]
      *  MBS_FIR_REG_INTERNAL_SCOM_ERROR_COPY
      */
-    (MbsFir, bit(30)) ? thresholdAndMask_self;
+    (MbsFir, bit(34)) ? thresholdAndMask_self;
 };
 
 ################################################################################
@@ -1089,22 +1119,46 @@ group gMcbistFir filter singlebit
     /** MBA0_MCBISTFIR[1]
      *  MBSFIRQ_MBX_PAR_ERRORS
      */
-    (Mba0_McbistFir, bit(1)) ? MBA0CalloutMedThr1UE;
+    (Mba0_McbistFir, bit(1)) ? MBA0CalloutMedThr1;
 
     /** MBA1_MCBISTFIR[1]
      *  MBSFIRQ_MBX_PAR_ERRORS
      */
-    (Mba1_McbistFir, bit(1)) ? MBA1CalloutMedThr1UE;
+    (Mba1_McbistFir, bit(1)) ? MBA1CalloutMedThr1;
 
-    /** MBA0_MCBISTFIR[2:14]
+    # This is for DD2 only
+    /** MBA0_MCBISTFIR[2]
+     *  MBSFIRQ_DRAM_EVENT_BIT0
+     */
+    (Mba0_McbistFir, bit(2)) ? defaultMaskedError;
+
+    # This is for DD2 only
+    /** MBA1_MCBISTFIR[2]
+     *  MBSFIRQ_DRAM_EVENT_BIT0
+     */
+    (Mba1_McbistFir, bit(2)) ? defaultMaskedError;
+
+    # This is for DD2 only
+    /** MBA0_MCBISTFIR[3]
+     *  MBSFIRQ_DRAM_EVENT_BIT1
+     */
+    (Mba0_McbistFir, bit(3)) ? defaultMaskedError;
+
+    # This is for DD2 only
+    /** MBA1_MCBISTFIR[3]
+     *  MBSFIRQ_DRAM_EVENT_BIT1
+     */
+    (Mba1_McbistFir, bit(3)) ? defaultMaskedError;
+
+    /** MBA0_MCBISTFIR[4:14]
      *  Reserved
      */
-    (Mba0_McbistFir, bit(2|3|4|5|6|7|8|9|10|11|12|13|14)) ? defaultMaskedError;
+    (Mba0_McbistFir, bit(4|5|6|7|8|9|10|11|12|13|14)) ? defaultMaskedError;
 
-    /** MBA1_MCBISTFIR[2:14]
+    /** MBA1_MCBISTFIR[4:14]
      *  Reserved
      */
-    (Mba1_McbistFir, bit(2|3|4|5|6|7|8|9|10|11|12|13|14)) ? defaultMaskedError;
+    (Mba1_McbistFir, bit(4|5|6|7|8|9|10|11|12|13|14)) ? defaultMaskedError;
 
     /** MBA0_MCBISTFIR[15]
      *  MBSFIRQ_INTERNAL_SCOM_ERROR
@@ -1415,3 +1469,12 @@ actionclass MBA1CalloutMedThr1UE
     MBA1CalloutMedThr1;
     SUEGenerationPoint;
 };
+
+/** The plugin checks if the membuf is at DD1.
+    If DD1, then callout thresholdAndMask_self and change signature
+    to DD1: MBS_FIR_REG_INTERNAL_SCOM_ERROR_COPY */
+actionclass mbsfirBit30
+{
+    threshold32pday;
+    try( funccall("mbsfirBit30_dd1"), L4CalloutMedThr1UE);
+};
diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfCenMembuf.C b/src/usr/diag/prdf/common/plat/pegasus/prdfCenMembuf.C
index f91d3f934..69b0c6a63 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/prdfCenMembuf.C
+++ b/src/usr/diag/prdf/common/plat/pegasus/prdfCenMembuf.C
@@ -1080,6 +1080,32 @@ PRDF_PLUGIN_DEFINE( Membuf, ClearServiceCallFlag );
 
 //------------------------------------------------------------------------------
 
+/**
+ * @brief   Checks DD level. If DD1, implements the DD1 callout actions for
+ *          MBSFIR bit 30.
+ * @param   i_membChip Centaur chip
+ * @param   i_sc       Step code data struct
+ * @returns SUCCESS if DD1, FAIL otherwise
+ */
+int32_t mbsfirBit30_dd1( ExtensibleChip * i_membChip,
+                         STEP_CODE_DATA_STRUCT & i_sc )
+{
+    int32_t l_rc = FAIL;
+    TargetHandle_t l_membTrgt = i_membChip->GetChipHandle();
+    if(0x20 > getChipLevel(l_membTrgt))
+    {
+        i_sc.service_data->SetCallout(l_membTrgt, MRU_MED);
+        ClearServiceCallFlag(i_membChip, i_sc);
+        i_sc.service_data->SetErrorSig( PRDFSIG_MbsFir_30_DD1Signature );
+        l_rc = SUCCESS;
+    }
+
+    return l_rc;
+}
+PRDF_PLUGIN_DEFINE( Membuf, mbsfirBit30_dd1 );
+
+//------------------------------------------------------------------------------
+
 // Define the plugins for memory ECC errors.
 #define PLUGIN_FETCH_ECC_ERROR( TYPE, MBA ) \
 int32_t AnalyzeFetch##TYPE##MBA( ExtensibleChip * i_membChip, \
diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfCenMembufExtraSig.H b/src/usr/diag/prdf/common/plat/pegasus/prdfCenMembufExtraSig.H
index fed2caeca..6769eacc1 100644
--- a/src/usr/diag/prdf/common/plat/pegasus/prdfCenMembufExtraSig.H
+++ b/src/usr/diag/prdf/common/plat/pegasus/prdfCenMembufExtraSig.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* IBM CONFIDENTIAL                                                       */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2013                   */
+/* COPYRIGHT International Business Machines Corp. 2013,2014              */
 /*                                                                        */
 /* p1                                                                     */
 /*                                                                        */
@@ -29,5 +29,7 @@
 PRDR_ERROR_SIGNATURE(MnfgDramCte,    0x44440000, "", "MNFG per DRAM CTE");
 PRDR_ERROR_SIGNATURE(MnfgHrCte,      0x44440001, "", "MNFG per half-rank CTE");
 PRDR_ERROR_SIGNATURE(MnfgDimmCte,    0x44440002, "", "MNFG per DIMM CTE");
+PRDR_ERROR_SIGNATURE(MbsFir_30_DD1Signature, 0x44440003, "MBSFIR[30]",
+                                   "DD1: MBS_FIR_REG_INTERNAL_SCOM_ERROR_COPY");
 
 #endif // __prdfCenMembufExtraSig_H
diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfP8Mcs.C b/src/usr/diag/prdf/common/plat/pegasus/prdfP8Mcs.C
index cd2aeb8cc..1c3ee9e1c 100755
--- a/src/usr/diag/prdf/common/plat/pegasus/prdfP8Mcs.C
+++ b/src/usr/diag/prdf/common/plat/pegasus/prdfP8Mcs.C
@@ -40,6 +40,8 @@
 #include <prdfP8McsDataBundle.H>
 #include <prdfCenMemUtils.H>
 
+#include <prdfP8McsExtraSig.H>
+
 //##############################################################################
 //
 //                             Special plugins
@@ -50,6 +52,7 @@ namespace PRDF
 {
 
 using namespace PlatServices;
+using namespace TARGETING;
 
 namespace Mcs
 {
@@ -275,6 +278,59 @@ int32_t ClearServiceCallFlag( ExtensibleChip * i_chip,
 }
 PRDF_PLUGIN_DEFINE( Mcs, ClearServiceCallFlag );
 
+/**
+ * @brief   Checks if the parent proc chip is either a Murano at DD least 2.0
+ *          or a Venice. If neither, implements the DD1 actions
+ *          of MBSFIR for the specified bit.
+ * @param   i_mcsChip MCS chip
+ * @param   i_sc      Step code data struct
+ * @return  FAIL if MuranoDD2Plus or Venice, SUCCESS otherwise
+ */
+int32_t dd1mcifirBit(ExtensibleChip * i_mcsChip,
+                     STEP_CODE_DATA_STRUCT & i_sc,
+                     uint32_t i_bitNum )
+{
+    int32_t l_rc = SUCCESS;
+    bool isMuranoDD2Plus = false;
+    bool isVenice = false;
+    TargetHandle_t l_mcsTrgt = i_mcsChip->GetChipHandle();
+    TargetHandle_t l_proc  = getParentChip( l_mcsTrgt );
+    uint8_t l_chipLevel = getChipLevel(l_proc);
+    MODEL l_model = getProcModel(l_proc);
+
+    if( MODEL_VENICE == l_model )
+        isVenice = true;
+    else if( (0x20 <= l_chipLevel) && (MODEL_MURANO == l_model) )
+        isMuranoDD2Plus = true;
+
+    if(isMuranoDD2Plus || isVenice)
+    {
+        l_rc = FAIL;
+    }
+    else
+    {
+        i_sc.service_data->SetCallout(l_mcsTrgt, MRU_MED);
+        ClearServiceCallFlag(i_mcsChip, i_sc);
+        if(48 == i_bitNum)
+            i_sc.service_data->SetErrorSig( PRDFSIG_MciFir_48_DD1Signature );
+        else if(49 == i_bitNum)
+            i_sc.service_data->SetErrorSig( PRDFSIG_MciFir_49_DD1Signature );
+    }
+
+    return l_rc;
+}
+
+#define PLUGIN_MCIFIR_DD1_CHECK( BITNUM )                     \
+int32_t dd1mcifirBit##BITNUM (ExtensibleChip * i_mcsChip,     \
+                              STEP_CODE_DATA_STRUCT & i_sc )  \
+{                                                             \
+    return dd1mcifirBit( i_mcsChip, i_sc, BITNUM );           \
+}                                                             \
+PRDF_PLUGIN_DEFINE( Mcs, dd1mcifirBit##BITNUM );
+
+PLUGIN_MCIFIR_DD1_CHECK( 48 )
+PLUGIN_MCIFIR_DD1_CHECK( 49 )
+
 } // end namespace Mcs
 } // end namespace PRDF
 
diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfP8McsExtraSig.H b/src/usr/diag/prdf/common/plat/pegasus/prdfP8McsExtraSig.H
new file mode 100644
index 000000000..78c0babd7
--- /dev/null
+++ b/src/usr/diag/prdf/common/plat/pegasus/prdfP8McsExtraSig.H
@@ -0,0 +1,33 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/diag/prdf/common/plat/pegasus/prdfP8McsExtraSig.H $   */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2014                   */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+#ifndef __prdfP8McsExtraSig_H
+#define __prdfP8McsExtraSig_H
+
+#include <prdrSignatures.H>
+
+PRDR_ERROR_SIGNATURE(MciFir_48_DD1Signature, 0x55550000, "MCIFIR[48]",
+                                            "DD1: MCIFIRQ_INTERNAL_SCOM_ERROR");
+PRDR_ERROR_SIGNATURE(MciFir_49_DD1Signature, 0x55550001, "MCIFIR[49]",
+                                      "DD1: MCIFIRQ_INTERNAL_SCOM_ERROR_CLONE");
+
+#endif // __prdfP8McsExtraSig_H