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authorZane Shelley <zshelle@us.ibm.com>2018-03-07 15:35:59 -0600
committerZane C. Shelley <zshelle@us.ibm.com>2018-03-09 14:08:21 -0500
commitf10101dc6c7e5be3e3fff9f0baff2c23b7436c06 (patch)
treef799484d592a08c079e61813bdab60df4cc7800d /src/usr/diag/prdf/plat/mem/prdfMemDynDealloc.C
parent83933bedd3ce9fc655fa78cea8d770244bec9baf (diff)
downloadtalos-hostboot-f10101dc6c7e5be3e3fff9f0baff2c23b7436c06.tar.gz
talos-hostboot-f10101dc6c7e5be3e3fff9f0baff2c23b7436c06.zip
PRD: DMD address translation bug.
First issue is that page garding is completely broken because we were using the wrong fields for the bank and bank group. Second issue is for MCAs that only have one DIMM plugged and that DIMM only has one rank of memory. In this case, rank/DIMM/port deallocation will deconfigure a range that is twice as big as the actual range. Change-Id: Ieb615260fe7ba6adb6a68ce3d4e3e24076351e72 CQ: SW419378 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55221 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com> Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com> Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55360 CI-Ready: Zane C. Shelley <zshelle@us.ibm.com>
Diffstat (limited to 'src/usr/diag/prdf/plat/mem/prdfMemDynDealloc.C')
-rw-r--r--src/usr/diag/prdf/plat/mem/prdfMemDynDealloc.C10
1 files changed, 7 insertions, 3 deletions
diff --git a/src/usr/diag/prdf/plat/mem/prdfMemDynDealloc.C b/src/usr/diag/prdf/plat/mem/prdfMemDynDealloc.C
index b2a6c7521..7c2ce36aa 100644
--- a/src/usr/diag/prdf/plat/mem/prdfMemDynDealloc.C
+++ b/src/usr/diag/prdf/plat/mem/prdfMemDynDealloc.C
@@ -164,7 +164,9 @@ int32_t __getMcaPortAddr( ExtensibleChip * i_chip, MemAddr i_addr,
if ( 0 == rnkBits )
{
if ( twoDimmConfig ) // The DIMM select goes into part 3.
+ {
rnk_pt3 = dslct; rnkBits_pt3 = 1;
+ }
}
else // At least one master or slave.
{
@@ -173,7 +175,9 @@ int32_t __getMcaPortAddr( ExtensibleChip * i_chip, MemAddr i_addr,
rnk_pt2 = rnk >> 1; rnkBits_pt2 = rnkBits - 1;
if ( twoDimmConfig ) // The DIMM select goes into part 1.
+ {
rnk_pt1 = dslct; rnkBits_pt1 = 1;
+ }
}
// Split the row into its components.
@@ -187,10 +191,10 @@ int32_t __getMcaPortAddr( ExtensibleChip * i_chip, MemAddr i_addr,
uint64_t c3 = (col & 0x01);
// Split the bank into its components.
- uint64_t bg0_bg1 = (bnk & 0x18) >> 3;
- uint64_t b0 = (bnk & 0x04) >> 2;
- uint64_t b1 = (bnk & 0x02) >> 1;
+ uint64_t b0 = (bnk & 0x10) >> 4;
+ uint64_t b1 = (bnk & 0x08) >> 3;
// NOTE: B2 is not supported on Nimbus.
+ uint64_t bg0_bg1 = (bnk & 0x03);
// Now start building the flexible part of the address (bits 0-7,23-33).
o_addr = (o_addr << rnkBits_pt1 ) | rnk_pt1;
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