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| author | Zane Shelley <zshelle@us.ibm.com> | 2018-04-20 11:33:58 -0500 |
|---|---|---|
| committer | Zane C. Shelley <zshelle@us.ibm.com> | 2018-04-22 21:11:03 -0400 |
| commit | 9404c33dff169a05f8537613e85fb605056a602d (patch) | |
| tree | e15e3453e5751c4b5a2e4241099c7676e12fc8db /src/usr/diag/prdf/common/plat/pegasus/prdfCenMbaTdCtlr_common.C | |
| parent | 422fb4d2643d642d4cca917cbda5c191ed3b3cf0 (diff) | |
| download | talos-hostboot-9404c33dff169a05f8537613e85fb605056a602d.tar.gz talos-hostboot-9404c33dff169a05f8537613e85fb605056a602d.zip | |
PRD: renamed MBSECCFIR, MCBISTFIR, and MBSTR registers for MBA
Change-Id: I05909a55b10148338e27aa7ce6af2279b77941b5
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57563
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com>
Reviewed-by: Matt Derksen <mderkse1@us.ibm.com>
Reviewed-by: Benjamin J. Weisenbeck <bweisenb@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57590
CI-Ready: Zane C. Shelley <zshelle@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src/usr/diag/prdf/common/plat/pegasus/prdfCenMbaTdCtlr_common.C')
| -rw-r--r-- | src/usr/diag/prdf/common/plat/pegasus/prdfCenMbaTdCtlr_common.C | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfCenMbaTdCtlr_common.C b/src/usr/diag/prdf/common/plat/pegasus/prdfCenMbaTdCtlr_common.C index 02e6c0fd9..0a30244e0 100644 --- a/src/usr/diag/prdf/common/plat/pegasus/prdfCenMbaTdCtlr_common.C +++ b/src/usr/diag/prdf/common/plat/pegasus/prdfCenMbaTdCtlr_common.C @@ -162,7 +162,7 @@ int32_t CenMbaTdCtlrCommon::prepareNextCmd( bool i_clearStats ) if ( i_clearStats ) { - reg_str = (0 == iv_mbaPos) ? "MBA0_MBSTR" : "MBA1_MBSTR"; + reg_str = (0 == iv_mbaPos) ? "MBSTR_0" : "MBSTR_1"; SCAN_COMM_REGISTER_CLASS * mbstr = iv_membChip->getRegister( reg_str ); @@ -195,8 +195,7 @@ int32_t CenMbaTdCtlrCommon::prepareNextCmd( bool i_clearStats ) // Clear ECC FIRs //---------------------------------------------------------------------- - reg_str = (0 == iv_mbaPos) ? "MBA0_MBSECCFIR_AND" - : "MBA1_MBSECCFIR_AND"; + reg_str = (0 == iv_mbaPos) ? "MBSECCFIR_0_AND" : "MBSECCFIR_1_AND"; SCAN_COMM_REGISTER_CLASS * firand = iv_membChip->getRegister( reg_str ); firand->setAllBits(); @@ -283,8 +282,7 @@ int32_t CenMbaTdCtlrCommon::checkEccErrors( uint16_t & o_eccErrorMask, do { - const char * reg_str = (0 == iv_mbaPos) ? "MBA0_MBSECCFIR" - : "MBA1_MBSECCFIR"; + const char * reg_str = (0 == iv_mbaPos) ? "MBSECCFIR_0" : "MBSECCFIR_1"; SCAN_COMM_REGISTER_CLASS * mbsEccFir = iv_membChip->getRegister( reg_str ); o_rc = mbsEccFir->Read(); |
