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authorAndrew Geissler <andrewg@us.ibm.com>2016-07-26 14:21:15 -0500
committerWilliam G. Hoffa <wghoffa@us.ibm.com>2016-08-16 15:43:07 -0400
commit025298b52002867f1e3516ba9810fd4642262980 (patch)
tree70ef20aabd7e1bb0d727e7f94d72ac74e522e62d /src/lib
parent5d57720970f8c8ffcefee7bfa5f9ec24f141501d (diff)
downloadtalos-hostboot-025298b52002867f1e3516ba9810fd4642262980.tar.gz
talos-hostboot-025298b52002867f1e3516ba9810fd4642262980.zip
Updates for new scratch registers in P9
P9 moves us from 8 scratch registers to 4. This commit handles this change and also adds the base support for partial cache. Change-Id: Ibe050c663744285dd3e77850649236a669dadbd6 RTC: 150923 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27462 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/lib')
-rw-r--r--src/lib/syscall_mmio.C7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/lib/syscall_mmio.C b/src/lib/syscall_mmio.C
index 1a0de8a9f..f7bce955b 100644
--- a/src/lib/syscall_mmio.C
+++ b/src/lib/syscall_mmio.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2010,2015 */
+/* Contributors Listed Below - COPYRIGHT 2010,2016 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -66,18 +66,19 @@ void mmio_hmer_write(uint64_t value)
*/
static uint64_t mmio_scratch_base()
{
- // @todo-RTC:130438 Verify value for P9
ProcessorCoreType cpuType = CpuID::getCpuType();
switch (cpuType)
{
case CORE_POWER8_MURANO:
case CORE_POWER8_VENICE:
case CORE_POWER8_NAPLES:
+ return 0x40;
case CORE_POWER9_NIMBUS:
case CORE_POWER9_CUMULUS:
case CORE_UNKNOWN:
default:
- return 0x40;
+ // See misc.C - updateScratchReg() for more info on this
+ return 0x00;
}
}
/** Global cache of the scratch register SPRC base address. */
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