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| author | Mark Wenning <wenning@us.ibm.com> | 2012-09-18 13:42:55 -0500 |
|---|---|---|
| committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2012-11-07 12:08:57 -0600 |
| commit | b23d4daee35dfc8761aecc86ade077be1bcac548 (patch) | |
| tree | af9d0bae4e63f21b6d098492e73f9b7b8d09be6b /src/kernel | |
| parent | 899d62da619d299b0869c8e2b8c7b416985243af (diff) | |
| download | talos-hostboot-b23d4daee35dfc8761aecc86ade077be1bcac548.tar.gz talos-hostboot-b23d4daee35dfc8761aecc86ade077be1bcac548.zip | |
pore_gen_cpureg
Change-Id: Ic5cb0817118bf0de7d706124708e5b8551ba4258
RTC: 41425
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1899
Tested-by: Jenkins Server
Reviewed-by: Van H. Lee <vanlee@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/kernel')
| -rw-r--r-- | src/kernel/cpumgr.C | 1 | ||||
| -rw-r--r-- | src/kernel/misc.C | 2 | ||||
| -rw-r--r-- | src/kernel/start.S | 11 |
3 files changed, 8 insertions, 6 deletions
diff --git a/src/kernel/cpumgr.C b/src/kernel/cpumgr.C index 2667d5b02..162b49f41 100644 --- a/src/kernel/cpumgr.C +++ b/src/kernel/cpumgr.C @@ -270,6 +270,7 @@ void CpuManager::activateCPU(cpu_t * i_cpu) // Verify / set SPRs. uint64_t msr = getMSR(); + msr |= 0x1000; // TODO: RTC: 51148 - Simics workaround for SW170137. kassert(WAKEUP_MSR_VALUE == msr); setLPCR(WAKEUP_LPCR_VALUE); } diff --git a/src/kernel/misc.C b/src/kernel/misc.C index 9b2872f04..beddbbb81 100644 --- a/src/kernel/misc.C +++ b/src/kernel/misc.C @@ -161,7 +161,7 @@ namespace KernelMisc // Create kernel save area and store ptr in bottom of kernel stack. task_t* saveArea = new task_t; memset(saveArea, '\0', sizeof(task_t)); - saveArea->context.msr_mask = 0xC030; // EE, PR, IR, DR. + saveArea->context.msr_mask = 0xD030; // EE, ME, PR, IR, DR. *(reinterpret_cast<task_t**>(cpu->kernel_stack_bottom)) = saveArea; // Execute winkle. diff --git a/src/kernel/start.S b/src/kernel/start.S index 2cd97d816..55cf7f193 100644 --- a/src/kernel/start.S +++ b/src/kernel/start.S @@ -30,11 +30,11 @@ _start: ;// Set thread priority high. or 2,2,2 - ;// Clear MSR[TA] (bit 1) and MSR[ME] (bit 51). + ;// Clear MSR[TA] (bit 1) and enable MSR[ME] (bit 51). mfmsr r2 - rldicl r2,r2,1,1 ;// Clear bit 1 - result [1-63,0] - rldicl r2,r2,50,1 ;// Clear bit 51 - result [51-63,0-50] - rldicl r2,r2,13,0 ;// Rotate around back to [0-63] + rldicl r2,r2,1,1 ;// Clear bit 1 - result [1-63,0] + rotrdi r2,r2,1 ;// Rotate right 1 - result [0,63] + ori r2,r2,4096 ;// Set bit 51 ;// Set up SRR0 / SRR1 to enable new MSR. mtsrr1 r2 li r2, _start_postmsr@l @@ -448,7 +448,7 @@ kernel_dispatch_task: stdcx. r0, TASK_CPUPTR, r1 ;// the CPU pointer in the task. mfmsr r2 ;// Get current MSR - ori r2,r2, 0xC030 ;// Enable MSR[EE,PR,IR,DR]. + ori r2,r2, 0xD030 ;// Enable MSR[EE,ME,PR,IR,DR]. rldicl r2,r2,50,1 ;// Clear ... rotldi r2,r2,14 ;// MSR[FP] ld r3, TASK_MSR_MASK(r1) ;// Load MSR mask. @@ -628,6 +628,7 @@ intvect_system_reset_inactive: beq+ _start ;// Now we are a winkled processor that is awoken. + ld r1, CPU_KERNEL_STACK_BOTTOM(r2) ld r1, 0(r1) mtsprg3 r1 |
