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authorPatrick Williams <iawillia@us.ibm.com>2012-02-16 17:22:51 -0600
committerA. Patrick Williams III <iawillia@us.ibm.com>2012-02-20 13:09:02 -0600
commit15713df3152439e6f3083442ce25e5d94b131c39 (patch)
tree254a8602af9b41376cf4af93d02b479a36e9c666 /src/kernel
parent795d84dc772c9ba7dc7921b6e784e51b003cd2e2 (diff)
downloadtalos-hostboot-15713df3152439e6f3083442ce25e5d94b131c39.tar.gz
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Handle hype_fac_unavail exception.
The P8 processor (in RFC02230 targeted for ISA 2.07) adds a new SPR register HFSCR (Hypervisor Facility Status and Control Register). This register allows the hypervisor to disable access to some resources, such as floating point and VSX, from a partition. The purpose of this is to save time in saving the partition context when switching partitions. Since we sometimes enable floating point instructions we need to also enable the HFSCR[FP]. We could do this when enabling floating point in the MSR, but the SPR does not exist in P7. Instead we'll do it as-needed on the hw-thread the first time it executes a FP instruction. The FP instruction will cause the hype_fac_unavail exception and the exception handler will set HFSCR appropriately. Change-Id: I6c1e75939bb59142cbcf692fa56deb2271d6bdc3 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/676 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/kernel')
-rw-r--r--src/kernel/start.S16
1 files changed, 16 insertions, 0 deletions
diff --git a/src/kernel/start.S b/src/kernel/start.S
index 1deaf46f1..c5af8652f 100644
--- a/src/kernel/start.S
+++ b/src/kernel/start.S
@@ -188,6 +188,22 @@ UNIMPL_INTERRUPT(perf_monitor, 0xF00)
UNIMPL_INTERRUPT(vector_unavail, 0xF20)
UNIMPL_INTERRUPT(vsx_unavail, 0xF40)
+UNIMPL_INTERRUPT(fac_unavail, 0xF60)
+
+ ;// P8 has a new HFSCR register which allows the hypervisor to disable
+ ;// access to facilities such as floating point to a partition, even if
+ ;// the partition enables via the MSR bits. Since the only of these
+ ;// facilities we allow is FP, we'll just set the HFSCR bits here if we
+ ;// get this exception.
+.org _start + 0xF80
+hype_fac_unavail:
+ mtspr HSPRG0, r0 ;// Free up a temporary register.
+ mfspr r0,HFSCR
+ ori r0, r0, 1 ;// Set FP=1 (bit 63).
+ mtspr HFSCR, r0
+ mfspr r0, HSPRG0 ;// Restore temporary
+ hrfid
+
;// Softpatch Exception Vector
;//
;// This exception vector implements the softpatch / denormalization assist
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