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author | Doug Gilbert <dgilbert@us.ibm.com> | 2012-11-21 17:36:02 -0600 |
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committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2012-12-14 10:46:50 -0600 |
commit | 468f784bbdb2176387a4f1f9ad3f0b10d15ad918 (patch) | |
tree | 7bfe554931935f1c0fe74914d1a44f229097afe5 /src/kernel | |
parent | df8e246c1afd3c5e63a7cead8db40b7b0fc0837a (diff) | |
download | talos-hostboot-468f784bbdb2176387a4f1f9ad3f0b10d15ad918.tar.gz talos-hostboot-468f784bbdb2176387a4f1f9ad3f0b10d15ad918.zip |
Switch Interrupt Presenter to get ICPBAR value from an attribute
Change-Id: I5d95f3e3e2d803f07c7d8f3bf2d8ee522e1b4519
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/2406
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/kernel')
-rw-r--r-- | src/kernel/intmsghandler.C | 127 | ||||
-rw-r--r-- | src/kernel/syscall.C | 9 |
2 files changed, 77 insertions, 59 deletions
diff --git a/src/kernel/intmsghandler.C b/src/kernel/intmsghandler.C index 73d14e787..a2f2fb096 100644 --- a/src/kernel/intmsghandler.C +++ b/src/kernel/intmsghandler.C @@ -1,31 +1,29 @@ -/* IBM_PROLOG_BEGIN_TAG - * This is an automatically generated prolog. - * - * $Source: src/kernel/intmsghandler.C $ - * - * IBM CONFIDENTIAL - * - * COPYRIGHT International Business Machines Corp. 2011-2012 - * - * p1 - * - * Object Code Only (OCO) source materials - * Licensed Internal Code Source Materials - * IBM HostBoot Licensed Internal Code - * - * The source code for this program is not published or other- - * wise divested of its trade secrets, irrespective of what has - * been deposited with the U.S. Copyright Office. - * - * Origin: 30 - * - * IBM_PROLOG_END_TAG - */ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/kernel/intmsghandler.C $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* COPYRIGHT International Business Machines Corp. 2011,2012 */ +/* */ +/* p1 */ +/* */ +/* Object Code Only (OCO) source materials */ +/* Licensed Internal Code Source Materials */ +/* IBM HostBoot Licensed Internal Code */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* Origin: 30 */ +/* */ +/* IBM_PROLOG_END_TAG */ #include <kernel/intmsghandler.H> #include <sys/msg.h> #include <util/singleton.H> #include <kernel/console.H> -#include <sys/interrupt.h> #include <util/lockfree/atomic_construct.H> #include <kernel/task.H> #include <kernel/taskmgr.H> @@ -33,13 +31,14 @@ #include <kernel/scheduler.H> #include <arch/ppc.H> -const char* INTR_MSGQ = "/msg/interrupt"; +const char* VFS_ROOT_MSG_INTR = "/msg/interrupt"; InterruptMsgHdlr * InterruptMsgHdlr::cv_instance = NULL; +uint64_t InterruptMsgHdlr::cv_ipc_base_address = 0; - -void InterruptMsgHdlr::create(MessageQueue * i_msgQ) +void InterruptMsgHdlr::create(MessageQueue * i_msgQ, uint64_t i_ipc_addr) { + cv_ipc_base_address = i_ipc_addr; if(cv_instance) { // TODO should this be considered an unrecoverable error? @@ -75,42 +74,58 @@ void InterruptMsgHdlr::handleInterrupt() { uint64_t pir = getPIR(); - uint64_t xirrAddress = (static_cast<uint64_t>(ICPBAR_VAL) << 20); + if( cv_ipc_base_address != 0 ) + { + uint64_t xirrAddress = cv_ipc_base_address; - xirrAddress += mmio_offset(pir); // Add offset for this cpu - xirrAddress += XIRR_ADDR_OFFSET; // Add offset for XIRR register + xirrAddress += mmio_offset(pir); // Add offset for this cpu + xirrAddress += XIRR_ADDR_OFFSET; // Add offset for XIRR register - // Ignore HRMOR setting - xirrAddress |= 0x8000000000000000ul; + // Ignore HRMOR setting + xirrAddress |= 0x8000000000000000ul; - uint32_t xirr = 0; - printkd ("XirrAddr %lx\n",xirrAddress); + uint32_t xirr = 0; + printkd ("XirrAddr %lx\n",xirrAddress); - // Reading this register acknowledges the interrupt and deactivates the - // external interrupt signal to the processor. The XIRR is now locked - // and can't be pre-empted by a "more favored" interrupt. - // This is a cache-inhibited load from hypervisor state. - // lwzcix BOP1,Ref_G0,BOP2 - asm volatile("lwzcix %0, 0, %1" - : "=r" (xirr) // output, %0 - : "r" (xirrAddress) // input, %1 - : ); // no impacts + // Reading this register acknowledges the interrupt and deactivates the + // external interrupt signal to the processor. The XIRR is now locked + // and can't be pre-empted by a "more favored" interrupt. + // This is a cache-inhibited load from hypervisor state. + // lwzcix BOP1,Ref_G0,BOP2 + asm volatile("lwzcix %0, 0, %1" + : "=r" (xirr) // output, %0 + : "r" (xirrAddress) // input, %1 + : ); // no impacts - if(cv_instance) - { - cv_instance->sendMessage(MSG_INTR_EXTERN, - (void *)pir, - (void *)xirr, - NULL); + if(cv_instance) + { + cv_instance->sendMessage(MSG_INTR_EXTERN, + (void *)pir, + (void *)xirr, + NULL); + } } - // else we got an external interrupt before we got things set up. - // TODO Is there anything that can be done other than - // leave the interrupt presenter locked. - // Does the code that sets up the IP registers need to check to see if - // there is an interrupt sitting there and send an EOI? - // Story 41868 - Mask off all interrupts very early - might - // resolve this TODO. + if(cv_ipc_base_address == 0 || cv_instance == NULL) + { + static bool hit = false; + + // print the message once + if(!hit) + { + printk("InterrurptMsgHdlr got called before IPC was setup\n"); + hit = true; + } + + + // else we got an external interrupt before we got things set up. + // TODO Is there anything that can be done other than + // leave the interrupt presenter locked. + // Does the code that sets up the IP registers need to check to see if + // there is an interrupt sitting there and send an EOI? + // Story 41868 - Mask off all interrupts very early - might + // resolve this TODO. + } } diff --git a/src/kernel/syscall.C b/src/kernel/syscall.C index b2a72d420..9ef1e36b3 100644 --- a/src/kernel/syscall.C +++ b/src/kernel/syscall.C @@ -272,9 +272,12 @@ namespace Systemcalls break; case MSGQ_ROOT_INTR: - msgQIntr = (MessageQueue*) TASK_GETARG1(t); - InterruptMsgHdlr::create(msgQIntr); - TASK_SETRTN(t,0); + { + msgQIntr = (MessageQueue*) TASK_GETARG1(t); + uint64_t ipc_addr = (uint64_t) TASK_GETARG2(t); + InterruptMsgHdlr::create(msgQIntr,ipc_addr); + TASK_SETRTN(t,0); + } break; default: |