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author | Dan Crowell <dcrowell@us.ibm.com> | 2017-02-28 17:00:11 -0600 |
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committer | Matthew A. Ploetz <maploetz@us.ibm.com> | 2017-03-09 11:35:06 -0500 |
commit | db08661c9db59150909a98c37a37edfde92a442c (patch) | |
tree | 6c65a3ef60a7e75071bb9f30a79dfcee133237ad /src/kernel | |
parent | c70e7f7817bba97fc5d5661f63ab2b5587855417 (diff) | |
download | talos-hostboot-db08661c9db59150909a98c37a37edfde92a442c.tar.gz talos-hostboot-db08661c9db59150909a98c37a37edfde92a442c.zip |
Create PVR routines to handle DD2 changes
Created new PVR_t structure that understands how to decode the
PVR for Nimbus DD1 and future versions.
Change-Id: Ie7e6f62d65fb1a3e11b1021f1600e7421b8c30a9
RTC: 160361
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37303
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com>
Diffstat (limited to 'src/kernel')
-rw-r--r-- | src/kernel/cpuid.C | 48 | ||||
-rw-r--r-- | src/kernel/cpumgr.C | 4 |
2 files changed, 32 insertions, 20 deletions
diff --git a/src/kernel/cpuid.C b/src/kernel/cpuid.C index 576c74043..f65612ae1 100644 --- a/src/kernel/cpuid.C +++ b/src/kernel/cpuid.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2011,2015 */ +/* Contributors Listed Below - COPYRIGHT 2011,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -27,37 +27,45 @@ */ #include <kernel/cpuid.H> +#include <arch/pvrformat.H> namespace CpuID { ProcessorCoreType getCpuType() { - uint64_t l_pvr = getPVR(); + PVR_t l_pvr( getPVR() ); - // Layout of the PVR is (32-bit): - // 2 nibbles reserved. - // 2 nibbles chip type. - // 1 nibble technology. - // 1 nibble major DD. - // 1 nibble reserved. - // 1 nibble minor DD. - - switch(l_pvr & 0xFFFF0000) + switch(l_pvr.chipFamily) { - case 0x004B0000: + case PVR_t::P8_MURANO: return CORE_POWER8_MURANO; - case 0x004C0000: + case PVR_t::P8_NAPLES: return CORE_POWER8_NAPLES; - case 0x004D0000: + case PVR_t::P8_VENICE: return CORE_POWER8_VENICE; - case 0x004E0000: - return CORE_POWER9_NIMBUS; + case PVR_t::P9_ALL: + { + // Nimbus DD1.0 has a different PVR format + if( (l_pvr.word & PVR_t::CHIP_DD_MASK) == PVR_t::IS_NIMBUS_DD1) + { + return CORE_POWER9_NIMBUS; + } + + switch(l_pvr.chipType) + { + case PVR_t::NIMBUS_CHIP: + return CORE_POWER9_NIMBUS; + + case PVR_t::CUMULUS_CHIP: + return CORE_POWER9_CUMULUS; - case 0x004F0000: - return CORE_POWER9_CUMULUS; + default: + return CORE_UNKNOWN; + } + } default: return CORE_UNKNOWN; @@ -66,8 +74,8 @@ namespace CpuID uint8_t getCpuDD() { - uint64_t l_pvr = getPVR(); - return ((l_pvr & 0x0F00) >> 4) | (l_pvr & 0x000F); + PVR_t l_pvr( getPVR() ); + return l_pvr.getDDLevel(); } }; diff --git a/src/kernel/cpumgr.C b/src/kernel/cpumgr.C index e6bf08dd9..f7cb25961 100644 --- a/src/kernel/cpumgr.C +++ b/src/kernel/cpumgr.C @@ -46,6 +46,7 @@ #include <kernel/kernel_reasoncodes.H> #include <kernel/cpuid.H> #include <kernel/doorbell.H> +#include <arch/pvrformat.H> cpu_t** CpuManager::cv_cpus[KERNEL_MAX_SUPPORTED_NODES]; bool CpuManager::cv_shutdown_requested = false; @@ -472,6 +473,9 @@ size_t CpuManager::getThreadCount() case CORE_UNKNOWN: default: + PVR_t l_pvr( getPVR() ); + printk("cputype=%d, pvr=%.8X\n", + CpuID::getCpuType(), l_pvr.word); kassert(false); break; } |