Update scratch SPR #s for P8.

Change-Id: Ia063a66b705b3272b7578ece420c84ac9c4c3d26
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/224
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Jenkins Server

2 files changed, 17 insertions, 29 deletions

diff --git a/src/include/arch/ppc.H b/src/include/arch/ppc.H
index 405a2c297..bed75b258 100644
--- a/src/include/arch/ppc.H
+++ b/src/include/arch/ppc.H
@@ -229,33 +229,4 @@ inline void doze()
     asm volatile("doze");
 }
 
-ALWAYS_INLINE
-inline void setScratch0Spr(uint64_t _data)
-{
-    // Write to SPRC(276) to select the register
-    //   0x20 selects SCRATCH 0 SPR
-    // Write to SPRD(277) to write the data
-    // TODO This is per P7 Pervasive Spec. Is this the same for Salerno/Venice?
-    register uint64_t address = 0x20;
-    register uint64_t data = _data;
-    asm volatile("mtspr 276, %0\n"
-                 "isync\n"
-                 "mtspr 277, %1" :: "r" (address), "r" (data));
-}
-
-ALWAYS_INLINE
-inline uint64_t getScratch0Spr()
-{
-    // Write to SPRC(276) to select the register
-    //   0x20 selects SCRATCH 0 SPR
-    // Read from SPRD(277) to get the data
-    // TODO This is per P7 Pervasive Spec. Is this the same for Salerno/Venice?
-    register uint64_t address = 0x20;
-    register uint64_t data = 0;
-    asm volatile("mtspr 276, %1\n"
-                 "isync\n"
-                 "mfspr %0, 277" : "=r" (data) : "r" (address));
-    return data;
-}
-
 #endif
diff --git a/src/include/kernel/misc.H b/src/include/kernel/misc.H
new file mode 100644
index 000000000..984acfe04
--- /dev/null
+++ b/src/include/kernel/misc.H
@@ -0,0 +1,17 @@
+/** @file misc.H
+ *  @brief Misc. Kernel functions and utilities.
+ */
+
+#ifndef __KERNEL_MISC_H
+#define __KERNEL_MISC_H
+
+#include <stdint.h>
+
+namespace KernelMisc
+{
+    /** @fn shutdown
+     *  @brief Sequence kernel to shutdown and switch to payload.
+     */
+    void shutdown();
+};
+#endif