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author | Brian Bakke <bbakke@us.ibm.com> | 2018-02-19 13:43:11 -0600 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2018-02-27 15:01:01 -0500 |
commit | bb0dc7d71263f7b67f17b297cf16d4535fce5a76 (patch) | |
tree | 6246ac8803fee48b9b8af02da4095568e6a21eaa /src/include | |
parent | d01ca15eccee25ca25bd26f15782d29ae9856c4f (diff) | |
download | talos-hostboot-bb0dc7d71263f7b67f17b297cf16d4535fce5a76.tar.gz talos-hostboot-bb0dc7d71263f7b67f17b297cf16d4535fce5a76.zip |
Add common XSCOM error literals to HBRT
Add a set of common XSCOM error literals that can be used
by all platforms. Add mechanisms to translate this common
set of literals into XSCOM error callouts. Preserve legacy
handling/translation.
Change-Id: I0f9ce25604efa0caf7d49e4ec7b5f2176a3c3a91
RTC: 86782
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54650
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/include')
-rw-r--r-- | src/include/runtime/interface.h | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/src/include/runtime/interface.h b/src/include/runtime/interface.h index 158e331dd..850ec0956 100644 --- a/src/include/runtime/interface.h +++ b/src/include/runtime/interface.h @@ -77,6 +77,25 @@ enum MemoryError_t }; +/** Common return codes to translate into pib error codes. */ +// RC for a piberr is equal to 0x1000 plus the pib error value, +// made into a negative +enum HbrtRcPiberr_t +{ + HBRT_RC_PIBERR_MASK = (0x00000000u - 0x00001007u), // 0xFFFF_EFF9 + + HBRT_RC_PIBERR_001_BUSY = (0x00000000u - 0x00001001u), // 0xFFFF_EFFF + HBRT_RC_PIBERR_010_OFFLINE = (0x00000000u - 0x00001002u), // 0xFFFF_EFFE + HBRT_RC_PIBERR_011_PGOOD = (0x00000000u - 0x00001003u), // 0xFFFF_EFFD + HBRT_RC_PIBERR_100_INVALIDADDR = (0x00000000u - 0x00001004u), // 0xFFFF_EFFC + HBRT_RC_PIBERR_101_CLOCKERR = (0x00000000u - 0x00001005u), // 0xFFFF_EFFB + HBRT_RC_PIBERR_110_PARITYERR = (0x00000000u - 0x00001006u), // 0xFFFF_EFFA + HBRT_RC_PIBERR_111_TIMEOUT = (0x00000000u - 0x00001007u), // 0xFFFF_EFF9 + + HBRT_RC_SOMEOTHERERROR = (0x00000000u - 0x00001008u) // 0xFFFF_EFF8 +}; + + /** * I2C Master Description: chip, engine and port packed into * a single 64-bit argument |