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authorMatt Derksen <mderkse1@us.ibm.com>2019-06-27 15:03:42 -0500
committerDaniel M Crowell <dcrowell@us.ibm.com>2020-01-20 10:23:06 -0600
commit829e56fb1456d699806f8e69ebddf7835c1ae633 (patch)
tree1b92407305312ea3983f817c45866e8d98755ec6 /src/include/usr/devicefw/driverif.H
parent1cb00f7e0e9c6cd2646d7e0245a5f22ecf97ab0c (diff)
downloadtalos-hostboot-829e56fb1456d699806f8e69ebddf7835c1ae633.tar.gz
talos-hostboot-829e56fb1456d699806f8e69ebddf7835c1ae633.zip
NVDIMM: Use block write for nvdimm update
In an effort to speed up the nvdimm update, full 32-byte blocks can now be sent via I2C SMBUS with no initial byte count byte. Since a block write seems more prone to random system interrupt, this code should be restricted to run on v3.A or beyond which has the timeout increased to mitigate these interrupts. Test results have shown about a 5 minute improvement per NVDIMM. Change-Id: I040a5f2cc5afb76a73129ef9f6ac965cf36775f4 CQ: SW471053 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/79678 Reviewed-by: Corey V Swenson <cswenson@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: TSUNG K YEUNG <tyeung@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/include/usr/devicefw/driverif.H')
-rw-r--r--src/include/usr/devicefw/driverif.H3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/include/usr/devicefw/driverif.H b/src/include/usr/devicefw/driverif.H
index 118e08973..66c420c21 100644
--- a/src/include/usr/devicefw/driverif.H
+++ b/src/include/usr/devicefw/driverif.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2011,2019 */
+/* Contributors Listed Below - COPYRIGHT 2011,2020 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -104,6 +104,7 @@ namespace DeviceFW
I2C_SMBUS_BYTE = 4, ///< I2c SMBUS Read/Write Byte
I2C_SMBUS_SEND_OR_RECV = 5, ///< I2c SMBUS Send/Receive Byte
I2C_SMBUS_WORD_NO_PEC = 6, ///< I2c SMBUS Read/Write Word without PEC byte
+ I2C_SMBUS_BLOCK_NO_BYTE_COUNT = 7, ///< I2c SMBUS Block Read/Write without first byte being a byte count
};
#ifndef PARSER
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