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authorCorey Swenson <cswenson@us.ibm.com>2015-01-27 09:05:37 -0600
committerA. Patrick Williams III <iawillia@us.ibm.com>2015-02-18 15:12:13 -0600
commit417c6e0a4bb7c8f9d9721b73ddcae696007be15e (patch)
tree42778d629a19bf85f740cbd649ca2d27d8a20aa9 /src/include/runtime
parent79ea7abf6d31c146c680d39b9f3ae007e434a573 (diff)
downloadtalos-hostboot-417c6e0a4bb7c8f9d9721b73ddcae696007be15e.tar.gz
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HBRT Runtime VPD Updates
Enables writes to VPD and handles disabling PNOR cache in manufacturing mode Change-Id: I03d4246ceb91520939f8b04f3b3d2fc31c116079 RTC: 114911 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/15462 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/include/runtime')
-rw-r--r--src/include/runtime/interface.h48
1 files changed, 48 insertions, 0 deletions
diff --git a/src/include/runtime/interface.h b/src/include/runtime/interface.h
index 9f52c09c1..9ade9a07d 100644
--- a/src/include/runtime/interface.h
+++ b/src/include/runtime/interface.h
@@ -41,6 +41,24 @@
#include <stdint.h>
#include <time.h>
+
+/**
+ * i2c master description: chip, engine and port packed into
+ * a single 64-bit argument
+ *
+ * ---------------------------------------------------
+ * | chip | reserved | eng | port |
+ * | (32) | (16) | (8) | (8) |
+ * ---------------------------------------------------
+ */
+#define HBRT_I2C_MASTER_CHIP_SHIFT 32
+#define HBRT_I2C_MASTER_CHIP_MASK (0xfffffffful << 32)
+#define HBRT_I2C_MASTER_ENGINE_SHIFT 8
+#define HBRT_I2C_MASTER_ENGINE_MASK (0xfful << 8)
+#define HBRT_I2C_MASTER_PORT_SHIFT 0
+#define HBRT_I2C_MASTER_PORT_MASK (0xfful)
+
+
/** @typedef hostInterfaces_t
* @brief Interfaces provided by the underlying environment (ex. Sapphire).
*
@@ -179,6 +197,36 @@ typedef struct hostInterfaces
int (*pnor_write) (uint32_t i_proc, const char* i_partitionName,
uint64_t i_offset, void* i_data, size_t i_sizeBytes);
+ /**
+ * @brief Read data from an i2c device
+ * @param[in] i_master - Chip/engine/port of i2c bus
+ * @param[in] i_devAddr - I2C address of device
+ * @param[in] i_offsetSize - Length of offset (in bytes)
+ * @param[in] i_offset - Offset within device to read
+ * @param[in] i_length - Number of bytes to read
+ * @param[out] o_data - Data that was read
+ * @return 0 on success else return code
+ * @platform OpenPOWER
+ */
+ int (*i2c_read)( uint64_t i_master, uint16_t i_devAddr,
+ uint32_t i_offsetSize, uint32_t i_offset,
+ uint32_t i_length, void* o_data );
+
+ /**
+ * @brief Write data to an i2c device
+ * @param[in] i_master - Chip/engine/port of i2c bus
+ * @param[in] i_devAddr - I2C address of device
+ * @param[in] i_offsetSize - Length of offset (in bytes)
+ * @param[in] i_offset - Offset within device to write
+ * @param[in] i_length - Number of bytes to write
+ * @param[in] Data to write
+ * @return 0 on success else return code
+ * @platform OpenPOWER
+ */
+ int (*i2c_write)( uint64_t i_master, uint16_t i_devAddr,
+ uint32_t i_offsetSize, uint32_t i_offset,
+ uint32_t i_length, void* i_data );
+
// Reserve some space for future growth.
void (*reserved[32])(void);
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