P9 page table changes

Change-Id: Ic5f234e0ce0747f887a706054f82372c9a96258c
RTC:126640
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19041
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: WILLIAM G. HOFFA <wghoffa@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

3 files changed, 66 insertions, 8 deletions

diff --git a/src/include/kernel/ppcconsts.S b/src/include/kernel/ppcconsts.S
index 6da85a9b2..404fbc34d 100644
--- a/src/include/kernel/ppcconsts.S
+++ b/src/include/kernel/ppcconsts.S
@@ -164,6 +164,7 @@
                 .set HSRR0,314
                 .set HSRR1,315
                 .set HMER,336
+                .set PTCR,464
                 .set HID0,1008
                 .set PIR, 1023
 
diff --git a/src/include/kernel/ptmgr.H b/src/include/kernel/ptmgr.H
index 9837a2dea..d6e6be151 100644
--- a/src/include/kernel/ptmgr.H
+++ b/src/include/kernel/ptmgr.H
@@ -5,7 +5,9 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* COPYRIGHT International Business Machines Corp. 2011,2014              */
+/* Contributors Listed Below - COPYRIGHT 2011,2015                        */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
 /*                                                                        */
 /* Licensed under the Apache License, Version 2.0 (the "License");        */
 /* you may not use this file except in compliance with the License.       */
@@ -26,6 +28,7 @@
 #include <stdint.h>
 #include <util/lockfree/stack.H>
 #include <kernel/vmmmgr.H>
+#include <config.h>
 
 /**
  * @class PageTableManager
@@ -191,7 +194,52 @@ class PageTableManager
      */
     char* ivTABLE;
 
+#ifdef CONFIG_P9_PAGE_TABLE
+    /**
+     * Represents a single entry in the page table
+     */
+    struct PageTableEntry
+    {
+        /**
+         * Dword0
+         */
+        union {
+            struct {  /**< Dword0 Attributes */
+                uint64_t rsv0:12; /**< 0:11  Reserved */
+                uint64_t AVA:45;  /**< 12:56  Abbrev VA, VA w/o bottom bits */
+                uint64_t SW:1;    /**< 57 =SW[0] - Reserved  */
+                uint64_t R2:1;    /**< 58 =SW[1] - Shadow R bit  */
+                uint64_t LRU:2;   /**< 59:60 =SW[2:3] Used for LRU algorithm */
+                uint64_t L:1;     /**< 61    Virtual page size  */
+                uint64_t H:1;     /**< 62    Hash function identifier  */
+                uint64_t V:1;     /**< 63    Entry valid  */
+            };
+            uint64_t dword0;  /**< Full Dword0 */
+        };
 
+        /**
+         * Dword1
+         */
+        union {
+            struct {  /**< Dword1 Attributes */
+                uint64_t pp0:1;    /**< 0     Page Protection bit 0  */
+                uint64_t TS:1;     /**< 1     Tag Set bit  */
+                uint64_t key0_1:2; /**< 2:3   KEY bits 0:1  <unused>  */
+                uint64_t B:2;      /**< 4:5   Segment Size  */
+                uint64_t rsv1:1;   /**< 6     Reserved */
+                uint64_t PN:45;    /**< 7:51  Abbrev RPN + Large Page Size  */
+                uint64_t key2_4:3; /**< 52:54 KEY bits 2:4  <unused>  */
+                uint64_t R:1;      /**< 55    Reference bit  */
+                uint64_t C:1;      /**< 56    Change bit  */
+                uint64_t WIMG:4;   /**< 57:60 Storage control bits  */
+                uint64_t N:1;      /**< 61    No-execute page (N==1)  */
+                uint64_t pp1_2:2;  /**< 62:63 Page Protection bits 1:2  */
+            };
+            uint64_t dword1;  /**< Full Dword1 */
+        };
+    } PACKED;
+    enum { PTE_AVA_MASK = 0x1FFFFFFFFFFF };
+#else
     /**
      * Represents a single entry in the page table
      */
@@ -203,10 +251,10 @@ class PageTableManager
         union {
             struct {  /**< Dword0 Attributes */
                 uint64_t B:2;    /**< 0:1   Segment Size  */
-                uint64_t AVA:55; /**< 2:56  Abbreviated Virtual Address = VA w/o bottom 23 bits  */
-                uint64_t SW:1;   /**< 57 =SW[] - Reserved  */
+                uint64_t AVA:55; /**< 2:56  Abbrev VA, VA w/o bottom 23 bits */
+                uint64_t SW:1;   /**< 57 =SW[0] - Reserved  */
                 uint64_t R2:1;   /**< 58 =SW[1] - Shadow R bit  */
-                uint64_t LRU:2;  /**< 59:60 =SW[2:3] - Used for LRU algorithm  */
+                uint64_t LRU:2;  /**< 59:60 =SW[2:3]  Used for LRU algorithm */
                 uint64_t L:1;    /**< 61    Virtual page size  */
                 uint64_t H:1;    /**< 62    Hash function identifier  */
                 uint64_t V:1;    /**< 63    Entry valid  */
@@ -222,7 +270,7 @@ class PageTableManager
                 uint64_t pp0:1;    /**< 0     Page Protection bit 0  */
                 uint64_t rsv:1;    /**< 1     Reserved  */
                 uint64_t key0_1:2; /**< 2:3   KEY bits 0:1  <unused>  */
-                uint64_t PN:48;    /**< 4:52  Abbreviated Real Page Number + Large page size selector  */
+                uint64_t PN:48;    /**< 4:52  Abbrev RPN + Large Page Size  */
                 uint64_t key2_4:3; /**< 53:54 KEY bits 2:4  <unused>  */
                 uint64_t R:1;      /**< 55    Reference bit  */
                 uint64_t C:1;      /**< 56    Change bit  */
@@ -233,6 +281,8 @@ class PageTableManager
             uint64_t dword1;  /**< Full Dword1 */
         };
     } PACKED;
+    enum { PTE_AVA_MASK = 0x7FFFFFFFFFFFFF };
+#endif
 
     /**
      * Internal Constants
diff --git a/src/include/kernel/vmmmgr.H b/src/include/kernel/vmmmgr.H
index 18897a6b5..9597aba57 100644
--- a/src/include/kernel/vmmmgr.H
+++ b/src/include/kernel/vmmmgr.H
@@ -58,8 +58,7 @@ class VmmManager
             /** We need to reserve a hole in heap memory for the page table,
              *  etc.  Use these constants to define the hole. */
             FIRST_RESERVED_PAGE = INITIAL_PT_OFFSET,
-            END_RESERVED_PAGE = INITIAL_PT_OFFSET +
-                                 PTSIZE + MBOX_DMA_SIZE,
+            END_RESERVED_PAGE = INITIAL_PT_OFFSET + PTSIZE + MBOX_DMA_SIZE,
 
             // Tells processor to ignore HRMOR
             FORCE_PHYS_ADDR = 0x8000000000000000,
@@ -226,9 +225,17 @@ class VmmManager
         static Spinlock* getLock();
 
     private:
+
+        // Partition Table
+        // 4K-aligned, each entry is 2 double words
+        // We only need one entry in the table
+        // So just use a 4K-aligned variable
+        static uint64_t g_patb[2] __attribute__ ((aligned (4096)));
+
         Spinlock lock;
 
         void initPTEs();
+        void initPartitionTable();
         void initSDR1();
 
         bool _pteMiss(task_t*, uint64_t, bool);
@@ -236,7 +243,7 @@ class VmmManager
         /** See findPhysicalAddress */
         uint64_t _findPhysicalAddress(uint64_t i_vaddr);
 
-        /* See mmSetPermission */
+        /** See mmSetPermission */
         int _mmSetPermission(void* i_va,uint64_t i_size, uint64_t i_access_type);
 
         /** See castOutPages */