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author | Bill Hoffa <wghoffa@us.ibm.com> | 2016-05-11 23:45:43 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-05-17 09:55:50 -0400 |
commit | ed28cbb43ed9b71bc2504983d1e472a1d7e19370 (patch) | |
tree | d5d1897763f1862b4fe4bd326e7afa9254ab73bf /src/include/arch | |
parent | d729f5915949de457a21305b6b0a724e2c6ac805 (diff) | |
download | talos-hostboot-ed28cbb43ed9b71bc2504983d1e472a1d7e19370.tar.gz talos-hostboot-ed28cbb43ed9b71bc2504983d1e472a1d7e19370.zip |
Update PIR Structure to Match Specification
- Change bit 24 to be reserved
Change-Id: Ic471d37bb304eb3ac06a37603762b6088f6bb2cb
CQ: SW352252
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24410
Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/include/arch')
-rw-r--r-- | src/include/arch/pirformat.H | 44 |
1 files changed, 24 insertions, 20 deletions
diff --git a/src/include/arch/pirformat.H b/src/include/arch/pirformat.H index 90d164f93..0085ccbf1 100644 --- a/src/include/arch/pirformat.H +++ b/src/include/arch/pirformat.H @@ -30,8 +30,8 @@ /** * @brief Format of Processor Id Register (PIR) for P9 * - * GGGGCCCPPPPPTT where - * G = group, C = chip, P = proc, T = thread + * GGGGCCCRPPPPPTT where + * G = group, C = chip, P = proc, T = thread, R = reserved */ struct PIR_t { @@ -42,9 +42,10 @@ struct PIR_t struct { // Normal Core Mode - uint32_t reserved:18; // 00:17 = unused - uint32_t groupId:4; // 18:21 = group id - uint32_t chipId:3; // 22:24 = chip id + uint32_t reserved0:17; // 00:16 = unused + uint32_t groupId:4; // 17:20 = group id + uint32_t chipId:3; // 21:23 = chip id + uint32_t reserved1:1; // 24 = reserved uint32_t coreId:5; // 25:29 = core id (normal core) uint32_t threadId:2; // 30:31 = thread id (normal core) } PACKED; @@ -52,9 +53,10 @@ struct PIR_t struct { // Fused Core Mode - uint32_t reservedFused:18; // 00:17 = unused - uint32_t groupIdFused:4; // 18:21 = group id - uint32_t chipIdFused:3; // 22:24 = chip id + uint32_t reservedFused0:17; // 00:16 = unused + uint32_t groupIdFused:4; // 17:20 = group id + uint32_t chipIdFused:3; // 21:23 = chip id + uint32_t reservedFused1:1; // 24 = reserved uint32_t coreIdFused:4; // 25:28 = core id (fused core) uint32_t threadIdFused:3; // 29:31 = thread id (fused core) } PACKED; @@ -63,8 +65,9 @@ struct PIR_t PIR_t(uint32_t i_groupId, uint32_t i_chipId, uint32_t i_coreId, uint32_t i_thread = 0) : - reserved(0), + reserved0(0), groupId(i_groupId), chipId(i_chipId), + reserved1(0), coreId(i_coreId), threadId(i_thread) {} PIR_t operator= (uint32_t i_word) @@ -86,30 +89,31 @@ struct PIR_t BITS_IN_CHIP = 3, BITS_IN_CORE = 5, BITS_IN_THREAD = 2, + BITS_IN_RESERVED1 = 1, BITS_AFTER_THREAD = 0, BITS_AFTER_CORE = BITS_AFTER_THREAD+BITS_IN_THREAD, - BITS_AFTER_CHIP = BITS_AFTER_CORE+BITS_IN_CORE, + BITS_AFTER_CHIP = BITS_IN_RESERVED1+BITS_AFTER_CORE+BITS_IN_CORE, BITS_AFTER_GROUP = BITS_AFTER_CHIP+BITS_IN_CHIP, - GROUP_MASK = 0x00003C00, - CHIP_MASK = 0x00000380, + GROUP_MASK = 0x00007800, + CHIP_MASK = 0x00000700, CORE_MASK = 0x0000007C, THREAD_MASK = 0x00000003, VALID_BITS = 0x00003FFF, - // Fused mode BITS_IN_CORE_FUSED = 5, BITS_IN_THREAD_FUSED = 3, - GROUP_MASK_FUSED = 0x00003C00, - CHIP_MASK_FUSED = 0x00000380, + GROUP_MASK_FUSED = 0x00007800, + CHIP_MASK_FUSED = 0x00000700, CORE_MASK_FUSED = 0x00000078, THREAD_MASK_FUSED = 0x00000007, }; // Some handy functions + // TODO RTC 154162 Add testcases for the below functions inline static uint32_t groupFromPir( uint32_t i_pir ) { return (static_cast<PIR_t>(i_pir)).groupId; } @@ -128,14 +132,14 @@ struct PIR_t } inline static uint32_t chipFromChipId( uint32_t i_chipId ) { return (i_chipId & (CHIP_MASK >> - (BITS_IN_CORE + BITS_IN_THREAD))); + (BITS_AFTER_CHIP))); } inline static uint32_t groupFromCoreId( uint32_t i_chipId ) { - return (i_chipId >> (BITS_IN_CHIP+ BITS_IN_CORE)); + return (i_chipId >> (BITS_AFTER_GROUP)); } inline static uint32_t chipFromCoreId( uint32_t i_chipId ) { - return (i_chipId >> BITS_IN_CORE); + return (i_chipId >> BITS_AFTER_CHIP); } inline static uint32_t coreFromCoreId( uint32_t i_chipId ) { return (i_chipId & (CORE_MASK >> BITS_IN_THREAD)); @@ -151,13 +155,13 @@ struct PIR_t { return ((((i_groupId << BITS_IN_CHIP) | i_chipId) - << BITS_IN_CORE) | i_coreId); + << (BITS_IN_RESERVED1 + BITS_IN_CORE)) | i_coreId); } inline static uint32_t createCoreId( uint32_t i_chipId, uint32_t i_coreId ) { - return ((i_chipId << BITS_IN_CORE) | i_coreId); + return ((i_chipId << (BITS_IN_CORE + BITS_IN_RESERVED1)) | i_coreId); } }; |