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authorMike Jones <mjjones@us.ibm.com>2011-07-18 13:01:59 -0500
committerA. Patrick Williams III <iawillia@us.ibm.com>2011-07-19 13:43:56 -0500
commit103f2e58b35ac7218d9960ceb6568ff7ceb332d2 (patch)
treeef4c3bf1e3b8fe380e03d2fc256bdd46d10214fc /src/include/arch
parentbe301c4ea87c944bd1c51ca2c73ac719cec6b495 (diff)
downloadtalos-hostboot-103f2e58b35ac7218d9960ceb6568ff7ceb332d2.tar.gz
talos-hostboot-103f2e58b35ac7218d9960ceb6568ff7ceb332d2.zip
Shutdown and post status on HostBoot completion
Change-Id: If2ab46af85065b29695a1186ed331fd835944eb4 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/204 Tested-by: Jenkins Server Reviewed-by: Mark W. Wenning <wenning@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/include/arch')
-rw-r--r--src/include/arch/ppc.H35
1 files changed, 35 insertions, 0 deletions
diff --git a/src/include/arch/ppc.H b/src/include/arch/ppc.H
index a87f339f2..7c19fdf16 100644
--- a/src/include/arch/ppc.H
+++ b/src/include/arch/ppc.H
@@ -185,4 +185,39 @@ inline void icbi(void* _ptr)
asm volatile("icbi 0, %0" : : "b" (ptr) : "memory");
}
+ALWAYS_INLINE
+inline void doze()
+{
+ asm volatile("doze");
+}
+
+ALWAYS_INLINE
+inline void setScratch0Spr(uint64_t _data)
+{
+ // Write to SPRC(276) to select the register
+ // 0x20 selects SCRATCH 0 SPR
+ // Write to SPRD(277) to write the data
+ // TODO This is per P7 Pervasive Spec. Is this the same for Salerno/Venice?
+ register uint64_t address = 0x20;
+ register uint64_t data = _data;
+ asm volatile("mtspr 276, %0\n"
+ "isync\n"
+ "mtspr 277, %1" :: "r" (address), "r" (data));
+}
+
+ALWAYS_INLINE
+inline uint64_t getScratch0Spr()
+{
+ // Write to SPRC(276) to select the register
+ // 0x20 selects SCRATCH 0 SPR
+ // Read from SPRD(277) to get the data
+ // TODO This is per P7 Pervasive Spec. Is this the same for Salerno/Venice?
+ register uint64_t address = 0x20;
+ register uint64_t data = 0;
+ asm volatile("mtspr 276, %1\n"
+ "isync\n"
+ "mfspr %0, 277" : "=r" (data) : "r" (address));
+ return data;
+}
+
#endif
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