diff options
author | Patrick Williams <iawillia@us.ibm.com> | 2011-08-01 11:58:16 -0500 |
---|---|---|
committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2011-08-10 13:59:31 -0500 |
commit | 35f739456cefd1540e0aa4a42722a73a56a6b661 (patch) | |
tree | 99a7272d36b8933b1d100d7edef62756f1aecedd /src/include/arch | |
parent | 791725b105cb8e61c9f93af844a80af12d07aad8 (diff) | |
download | talos-hostboot-35f739456cefd1540e0aa4a42722a73a56a6b661.tar.gz talos-hostboot-35f739456cefd1540e0aa4a42722a73a56a6b661.zip |
Update scratch SPR #s for P8.
Change-Id: Ia063a66b705b3272b7578ece420c84ac9c4c3d26
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/224
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Jenkins Server
Diffstat (limited to 'src/include/arch')
-rw-r--r-- | src/include/arch/ppc.H | 29 |
1 files changed, 0 insertions, 29 deletions
diff --git a/src/include/arch/ppc.H b/src/include/arch/ppc.H index 405a2c297..bed75b258 100644 --- a/src/include/arch/ppc.H +++ b/src/include/arch/ppc.H @@ -229,33 +229,4 @@ inline void doze() asm volatile("doze"); } -ALWAYS_INLINE -inline void setScratch0Spr(uint64_t _data) -{ - // Write to SPRC(276) to select the register - // 0x20 selects SCRATCH 0 SPR - // Write to SPRD(277) to write the data - // TODO This is per P7 Pervasive Spec. Is this the same for Salerno/Venice? - register uint64_t address = 0x20; - register uint64_t data = _data; - asm volatile("mtspr 276, %0\n" - "isync\n" - "mtspr 277, %1" :: "r" (address), "r" (data)); -} - -ALWAYS_INLINE -inline uint64_t getScratch0Spr() -{ - // Write to SPRC(276) to select the register - // 0x20 selects SCRATCH 0 SPR - // Read from SPRD(277) to get the data - // TODO This is per P7 Pervasive Spec. Is this the same for Salerno/Venice? - register uint64_t address = 0x20; - register uint64_t data = 0; - asm volatile("mtspr 276, %1\n" - "isync\n" - "mfspr %0, 277" : "=r" (data) : "r" (address)); - return data; -} - #endif |